IC62LV256 ICSI [Integrated Circuit Solution Inc], IC62LV256 Datasheet - Page 8

• Manufacturer Part Number: IC62LV256
• Description: 32K x 8 Low Power SRAM with 3.3V
• Manufacturer: ICSI [Integrated Circuit Solution Inc]

IC62LV256
WRITE CYCLE NO. 2 (CE
8
Notes:
1. The internal write time is defined by the overlap of CE LOW and WE LOW. All signals must be in valid states to initiate a Write,
2. I/O will assume the High-Z state if OE
but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling
edge of the signal that terminates the Write.
ADDRESS
D
OUT
WE
D
CE
IN
CE
CE
CE
CE Controlled)
DATA UNDEFINED
t
SA
≥
V
IH
.
(1,2)
t
HZWE
t
AW
t
t
SCE
PWE
t
WC
HIGH-Z
t
SD
DATA-IN VALID
t
HA
t
t
HD
LZWE
Integrated Circuit Solution Inc.
ALSR007-0A 10/5/2001