AX88850 ASIX [ASIX Electronics Corporation], AX88850 Datasheet - Page 15

• Manufacturer Part Number: AX88850
• Description: 100BASE-TX/FX Repeater Controller
• Manufacturer: ASIX [ASIX Electronics Corporation]

2.3 Station Management Interface
SMDC
SMDIO
/SMDV
SMDIR
BSMDC
BSMDIO
2.4 Management Information Base (MIB) Interface
MD
MTX_RDY
Signal Name Type Pin No.
Signal Name Type Pin No.
AX88850
I/O/L
I/O/L
I/O/Z
I/PU
/MH
O/L
O/L
O/L
/PU
/PU
/PU
I
116
115
114
110
112
111
155
109
Station Management Data Clock : The timing reference for MDIO. All data
transfers on MDIO are synchronized to the rising edge of this clock. MDC is
limited to a maximum frequency of 2.5MHz.
Station Management Data Input / Output : Serial data input/output transfers
from/to the internal registers or PHYs . The transfer protocol conforms to the
IEEE 802.3u MII specification.
Station Management Data Valid : Asserted when a valid read/write command
is present.
Station Management Data Direction : Direction signal for an external bi-
directional buffer on the MDIO signal.
Defaults to 0 when no register access is present.
Buffered Station Management Data Clock : Buffered MDC signal. Allow
more devices to be chained on the MII serial bus.
Buffered Station Management Data Input /Output : Buffered MDIO signal.
When the “PHY_access” bit in the CONFIG register is set High, the MDIO
signal is passed through to BMDIO for accessing the physical device chips.
Management Data : Outputs management information for the AX88856 MIB
chip. This signal carries with RID_CH signal and port number of the in-
coming packet and is synchronous to IRD_CK signal.
Repeated Packet Ready : Repeated packet data ready to copy to MIB chip
indicator.
0 = MDIO data flows into the AX88850
1 = MDIO data flows out of the AX88850
15
Description
Description
ASIX ELECTRONICS CORPORATION
PRELIMINARY