P4C150-10CC PYRAMID [Pyramid Semiconductor Corporation], P4C150-10CC Datasheet
P4C150-10CC
Related parts for P4C150-10CC
P4C150-10CC Summary of contents
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... Time required to reset is only 20 ns for the 10 ns SRAM. CMOS is used to reduce power consumption to a low level. The P4C150 is available in 24-pin 300 mil DIP and SOIC packages providing excellent board level densities. The device is also available in a 28-pin LCC package as well as a 24-pin FLATPACK for military applications. ...
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... This parameter is sampled and not 100% tested. Parameter Value – +125 – +150 1.0 50 (4) = 25° 1.0MHz) A Parameter Conditions Typ. Unit OUT P4C150 Min. Max. 2.4 0.4 2.2 V =+0.5 CC –0.5 (3) 0.8 –5 +5 – -35 ...
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... Read Cycle Time is measured from the last valid address to the first transitioning address. -20 -25 -35 Max Min Max Min Max (5, 7) Page P4C150 Unit ...
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... P4C150 TIMING WAVEFORM OF READ CYCLE NO. 3 (OE AC CHARACTERISTICS—RESET CYCLE ( ± 10%, All Temperature Ranges) CC Symbol Parameter Min Max t Reset Cycle Time 20 RRC t Write Enable High to WER Beginning of Reset t Chip Select Low to CR Beginning of Reset t Reset Pulse Width 10 RP Chip Select Hold ...
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... CONTROLLED CONTROLLED) 12. Write Cycle Time is measured from the last valid address to the first transition address. P4C150 -20 -25 -35 Unit Min Max Min Max Min Max ...
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... Figure 1. Output Load * including scope and test fixture. Note: Due to the ultra-high speed of the P4C150, care must be taken when testing this device; an inadequate setup can cause a normal functioning part to be rejected as faulty. Long high-inductance leads that cause supply bounce must be avoided by bringing the V ...
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... ORDERING INFORMATION SELECTION GUIDE The P4C150 is available in the following temperature, speed and package options. Temperature Package Range Plastic DIP Commercial Temperature Plastic SOIC Side Brazed DIP CERDIP Military Temperature CERPACK LCC Side Brazed DIP CERDIP Military Processed* CERPACK LCC * Military temperature range with MIL-STD-883, Class B processing. ...
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... P4C150 SIDE BRAZED DUAL IN-LINE PACKAGE C4 Pkg # # Pins 24 (300 mil) Symbol Min Max A - 0.200 b 0.014 0.026 b2 0.045 0.065 C 0.008 0.018 D - 1.280 E 0.220 0.310 eA 0.300 BSC e 0.100 BSC L 0.125 0.200 Q 0.015 0.060 S1 0.005 - S2 0.005 - CERDIP DUAL IN-LINE PACKAGE Pkg # D4 # Pins 24 (300 mil) ...
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... Max A 0.060 0.075 A1 0.050 0.065 B1 0.022 0.028 D 0.342 0.358 D1 0.200 BSC D2 0.100 BSC D3 - 0.358 E 0.540 0.560 E1 0.400 BSC E2 0.200 BSC E3 - 0.558 e 0.050 BSC h 0.040 REF j 0.020 REF L 0.045 0.055 L1 0.045 0.055 L2 0.075 0.095 Document # SRAM105 REV A P4C150 Page ...
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... P4C150 PLASTIC DUAL IN-LINE PACKAGE P4 Pkg # # Pins 24 (300 Mil) Symbol Min Max A - 0.210 A1 0.015 - b 0.014 0.022 b2 0.045 0.070 C 0.008 0.014 D 1.230 1.280 E1 0.240 0.280 E 0.300 0.325 e 0.100 BSC eB - 0.430 L 0.115 0.150 0° 15° SOIC/SOP SMALL OUTLINE IC PACKAGE Pkg # S4 # Pins 24 (300 Mil) ...
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... REVISIONS DOCUMENT NUMBER: SRAM105 DOCUMENT TITLE: P4C150 ULTRA HIGH SPEED RESETTABLE STATIC CMOS RAM ORIG. OF ISSUE REV. DATE CHANGE OR 1997 DAB A Oct-05 JDB Document # SRAM105 REV A DESCRIPTION OF CHANGE New Data Sheet Change logo to Pyramid P4C150 Page ...