P4C150-10CC PYRAMID [Pyramid Semiconductor Corporation], P4C150-10CC Datasheet - Page 5
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P4C150-10CC
Manufacturer Part Number
P4C150-10CC
Description
ULTRA HIGH SPEED 1K X 4 RESETTABLE STATIC CMOS RAM
Manufacturer
PYRAMID [Pyramid Semiconductor Corporation]
Datasheet
1.P4C150-10CC.pdf
(11 pages)
AC CHARACTERISTICS—WRITE CYCLE
(V
TIMING WAVEFORM OF WRITE CYCLE NO. 1 (WE
TIMING WAVEFORM OF WRITE CYCLE NO. 2 (CS
Notes:
10. CS and WE must be LOW for WRITE cycle.
11. If CS goes HIGH simultaneously with WE high, the output remains
Document # SRAM105 REV A
Sym.
t
t
t
t
t
t
t
t
CC
t
t
WC
CW
AW
WP
DW
WZ
OW
AS
AH
DH
in a high impedance state.
= 5V ± 10%, All Temperature Ranges)
Write Cycle Time
Chip Enable Time to End of Write
Address Valid to End of Write
Address Set-up Time
Write Pulse Width
Address Hold Time from
End of Write
Data Valid to End of Write
Data Hold Time
Write Enable to Output in High Z
Output Active from End of Write
Parameter
(2)
Min
10
8
8
0
8
0
5
0
2
-10
Max
5
Min
12
10
10
10
2
1
1
8
1
-12
Max
WE
WE
WE
WE CONTROLLED)
CS
CS
CS
CS CONTROLLED)
8
12. Write Cycle Time is measured from the last valid address to the first
transition address.
Min
15
11
13
11
11
1
1
1
2
-15
Max
12
Min
20
13
16
13
13
1
1
1
3
-20
Max
15
(10)
(10)
Min
25
15
20
15
15
2
2
2
3
-25
Max
20
Min
35
20
25
20
20
2
2
2
3
-35
Page 5 of 11
Max
25
P4C150
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns