P520-38OC PLL [PhaseLink Corporation], P520-38OC Datasheet

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P520-38OC

Manufacturer Part Number
P520-38OC
Description
PECL and LVDS Low Phase Noise VCXO (for 65-130MHz Fund Xtal)
Manufacturer
PLL [PhaseLink Corporation]
Datasheet
FEATURES
DESCRIPTION
The PLL520-38/-39 is a family of VCXO IC’s
specifically designed to pull high frequency
fundamental crystals from 65MHz to 130MHz, with
selectable PECL or LVDS outputs.. They achieve
very low current into the crystal resulting in better
overall stability. Their internal varicaps allow an on
chip frequency pulling, controlled by the VCON
input. Their very low jitter makes them ideal for the
most demanding timing requirements.
BLOCK DIAGRAM
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/20/04 Page 1
VCON
XOUT
XIN
65MHz to 130MHz Fundamental Mode Crystal.
Output range: 65MHz – 130MHz (no PLL).
Low Injection Power for crystal 50uW.
PECL (PLL520-38) or LVDS output (PLL520-39).
Integrated variable capacitors.
Supports 2.5V or 3.3V-Power Supply.
Available in 16-Pin (TSSOP or 3x3 QFN).
PECL and LVDS Low Phase Noise VCXO (for 65-130MHz Fund Xtal)
integrated
Oscillator
Amplifier
varicaps
w/
PLL520-38/-39
OE
Q
Q
PIN CONFIGURATION
OUTPUT ENABLE LOGICAL LEVELS
OE input: Logical states defined by PECL levels for PLL520-38
PLL520-38
PLL520-39
Part #
VCON
XOUT
GND
VDD
N/C
N/C
XIN
XOUT
OE
Logical states defined by CMOS levels for PLL520-39
N/C
XIN
OE
1
2
3
4
5
6
7
8
13
14
15
16
(Default)
(Default)
12
1
PLL520-38/-39
OE
0
1
0
1
P520-3x
11
2
10
3
16
15
14
13
12
11
10
9
Output enabled
Tri-state
Tri-state
Output enabled
9
4
8
7
6
5
N/C
N/C
GND
CLKC
VDD
CLKT
N/C
N/C
State
GND
CLKC
VDD
CLKT

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P520-38OC Summary of contents

Page 1

... GND N CLKC N VDD CLKT XIN GND 13 8 XOUT CLKC 14 7 P520-3x N/C VDD CLKT State 0 Output enabled (Default) 1 Tri-state 0 Tri-state 1 Output enabled (Default) Logical states defined by CMOS levels for PLL520-39 ...

Page 2

PECL and LVDS Low Phase Noise VCXO (for 65-130MHz Fund Xtal) PIN DESCRIPTIONS Name Number XIN 2 XOUT VCON 7 GND 8, 14 CLKT 11 CLKC 13 N/C 4,5,9,10,15,16 VDD 1, 12 ELECTRICAL SPECIFICATIONS 1. Absolute Maximum ...

Page 3

PECL and LVDS Low Phase Noise VCXO (for 65-130MHz Fund Xtal) 3. Voltage Control Crystal Oscillator (3.3V) PARAMETERS VCXO Stabilization Time * VCXO Tuning Range CLK output pullability On-chip Varicaps control range Linearity VCXO Tuning Characteristic VCON input impedance VCON ...

Page 4

PECL and LVDS Low Phase Noise VCXO (for 65-130MHz Fund Xtal) 7. LVDS Electrical Characteristics PARAMETERS Output Differential Voltage V Magnitude Change DD Output High Voltage Output Low Voltage Offset Voltage Offset Magnitude Change Power-off Leakage Output Short Circuit Current ...

Page 5

PECL and LVDS Low Phase Noise VCXO (for 65-130MHz Fund Xtal) 9. PECL Electrical Characteristics PARAMETERS SYMBOL Output High Voltage Output Low Voltage 10. PECL Switching Characteristics PARAMETERS Clock Rise Time Clock Fall Time PECL Levels Test Circuit OUT 50Ω ...

Page 6

PECL and LVDS Low Phase Noise VCXO (for 65-130MHz Fund Xtal) PACKAGE INFORMATION 16 PIN TSSOP ( Sym bol M in 1.20 A1 0.05 0.15 B 0.19 0.30 C 0.09 0.20 D 4.90 ...

Page 7

... Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/20/04 Page 7 47745 Fremont Blvd., Fremont, CA 94538, USA Tel: (510) 492-0990 Fax: (510) 492-0991 PART NUMBER PLL520- Marking P520-38OC P520-38OC P520-38QC P520-38QC P520-39OC P520-39OC P520-39QC P520-39QC PLL520-38/-39 ...

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