16F84 MICROCHIP [Microchip Technology], 16F84 Datasheet - Page 54

• Manufacturer Part Number: 16F84
• Description: 18-pin Flash/EEPROM 8-Bit Microcontrollers
• Manufacturer: MICROCHIP [Microchip Technology]

PIC16F8X
TABLE 9-2
DS30430C-page 54
Note 1:
CLRWDT
RETURN
DECFSZ
MOVWF
ADDWF
ANDWF
SUBWF
XORWF
ADDLW
ANDLW
MOVLW
XORLW
INCFSZ
SWAPF
RETFIE
RETLW
SUBLW
BTFSC
IORWF
BTFSS
IORLW
SLEEP
CLRW
COMF
GOTO
DECF
MOVF
CLRF
CALL
INCF
NOP
RRF
BCF
BSF
RLF
Mnemonic,
Operands
2: If this instruction is executed on the TMR0 register (and, where applicable, d = 1), the prescaler will be cleared if assigned
3: If Program Counter (PC) is modified or a conditional test is true, the instruction requires two cycles. The second cycle is
When an I/O register is modified as a function of itself ( e.g., MOVF PORTB, 1), the value used will be that value present
on the pins themselves. For example, if the data latch is '1' for a pin configured as input and is driven low by an external
device, the data will be written back with a '0'.
to the Timer0 Module.
executed as a NOP.
f, d
f, d
f
-
f, d
f, d
f, d
f, d
f, d
f, d
f, d
f
-
f, d
f, d
f, d
f, d
f, d
f, b
f, b
f, b
f, b
k
k
k
-
k
k
k
-
k
-
-
k
k
PIC16FXX INSTRUCTION SET
Rotate Right f through Carry
Rotate Left f through Carry
Exclusive OR literal with W
Inclusive OR literal with W
Return from Subroutine
Return with literal in W
Clear Watchdog Timer
Subtract W from literal
Exclusive OR W with f
Bit Test f, Skip if Clear
Go into standby mode
Decrement f, Skip if 0
Inclusive OR W with f
Return from interrupt
Increment f, Skip if 0
Bit Test f, Skip if Set
AND literal with W
Subtract W from f
Add literal and W
Swap nibbles in f
Move literal to W
Call subroutine
Complement f
Go to address
AND W with f
No Operation
Description
Add W and f
Decrement f
BYTE-ORIENTED FILE REGISTER OPERATIONS
Move W to f
Increment f
Bit Clear f
BIT-ORIENTED FILE REGISTER OPERATIONS
Clear W
Bit Set f
Clear f
Move f
LITERAL AND CONTROL OPERATIONS
Cycles
1 (2)
1 (2)
1(2)
1(2)
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
1
2
1
1
2
2
2
1
1
1
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
MSb
01
01
01
01
11
11
10
00
10
11
11
00
11
00
00
11
11
14-Bit Opcode
0111
0101
0001
0001
1001
0011
1011
1010
1111
0100
1000
0000
0000
1101
1100
0010
1110
0110
00bb
01bb
10bb
11bb
111x
1001
0kkk
0000
1kkk
1000
00xx
0000
01xx
0000
0000
110x
1010
dfff
dfff
lfff
0xxx
dfff
dfff
dfff
dfff
dfff
dfff
dfff
lfff
0xx0
dfff
dfff
dfff
dfff
dfff
kkkk
kkkk
kkkk
0110
kkkk
kkkk
kkkk
0000
kkkk
0000
0110
kkkk
kkkk
bfff
bfff
bfff
bfff
1998 Microchip Technology Inc.
ffff
ffff
ffff
xxxx
ffff
ffff
ffff
ffff
ffff
ffff
ffff
ffff
0000
ffff
ffff
ffff
ffff
ffff
ffff
ffff
ffff
ffff
kkkk
kkkk
kkkk
0100
kkkk
kkkk
kkkk
1001
kkkk
1000
0011
kkkk
kkkk
LSb
Affected
C,DC,Z
C,DC,Z
C,DC,Z
C,DC,Z
TO
TO
Status
C
C
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
,
,
PD
PD
Notes
1,2,3
1,2,3
1,2
1,2
1,2
1,2
1,2
1,2
1,2
1,2
1,2
1,2
1,2
1,2
1,2
1,2
2
3
3