16F84 MICROCHIP [Microchip Technology], 16F84 Datasheet - Page 63

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16F84

Manufacturer Part Number
16F84
Description
18-pin Flash/EEPROM 8-Bit Microcontrollers
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
NOP
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example
OPTION
Operands:
Syntax:
Operation:
Status Affected: None
Encoding:
Description:
Words:
Cycles:
Example
1998 Microchip Technology Inc.
No Operation
[ label ]
None
No operation
None
No operation.
1
1
Load Option Register
[ label ]
None
(W)
The contents of the W register are
loaded in the OPTION register. This
instruction is supported for code com-
patibility with PIC16C5X products.
Since OPTION is a readable/writable
register, the user can directly address
it.
1
1
Decode
NOP
To maintain upward compatibility
with future PIC16CXX products,
Q1
00
00
do not use this instruction.
OPTION
NOP
No-Opera
OPTION
0000
0000
Q2
tion
No-Opera
0110
0xx0
Q3
tion
No-Operat
0010
0000
Q4
ion
RETFIE
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example
2nd Cycle
1st Cycle
Return from Interrupt
[ label ]
None
TOS
1
None
Return from Interrupt. Stack is POPed
and Top of Stack (TOS) is loaded in the
PC. Interrupts are enabled by setting
Global Interrupt Enable bit, GIE
(INTCON<7>). This is a two cycle
instruction.
1
2
After Interrupt
No-Operat
RETFIE
Decode
Q1
00
ion
GIE
PC,
PC =
GIE =
PIC16F8X
RETFIE
No-Opera
No-Opera
0000
Q2
tion
tion
DS30430C-page 63
TOS
1
No-Opera
0000
Set the
GIE bit
Q3
tion
No-Operat
the Stack
Pop from
1001
Q4
ion

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