ADIS16480 AD [Analog Devices], ADIS16480 Datasheet - Page 36

• Manufacturer Part Number: ADIS16480
• Description: Ten Degrees of Freedom Inertial Sensor
• Manufacturer: AD [Analog Devices]

ADIS16480
SYSTEM CONTROLS
The
for managing its operation, which include reset, self-test,
calibration, memory management, and I/O configuration.
GLOBAL COMMANDS
The GLOB_CMD register (see Table 146) provides trigger bits for
several operations. Write 1 to the appropriate bit in GLOB_CMD to
start a function. After the function completes, the bit restores to 0.
Table 146. GLOB_CMD (Page 3, Base Address = 0x02)
Bits
15
[14:10]
9
8
7
6
[5:4]
3
2
1
0
Software Reset
Turn to Page 3 (DIN = 0x8003) and then set GLOB_CMD[7] = 1
(DIN = 0x8280, DIN = 0x8300) to reset the operation, which
removes all data, initializes all registers from their flash settings,
and starts data collection. This function provides a firmware
alternative to the RST line (see Table 5, Pin 8).
Automatic Self-Test
Turn to Page 3 (DIN = 0x8003) and then set GLOB_CMD[1] = 1
(DIN = 0x8202, then DIN = 0x8300) to run an automatic self-
test routine, which executes the following steps:
1.
2.
3.
4.
5.
6.
7.
After waiting 12 ms for this test to complete, turn to Page 0
(DIN = 0x8000) and read DIAG_STS using DIN = 0x0A00.
Note that using an external clock can extend this time. When
using an external clock of 100 Hz, this time extends to 35 ms.
Note that 100 Hz is too slow for optimal sensor performance.
ADIS16480
Measure output on each sensor.
Activate self-test on each sensor.
Measure output on each sensor.
Deactivate the self-test on each sensor.
Calculate the difference with self-test on and off.
Compare the difference with internal pass/fail criteria.
Report the pass/fail results for each sensor in DIAG_STS.
Description
EKF reset
Not used
Reset the reference rotation
matrix
Tare command
Software reset
Factory calibration restore
Not used
Flash memory update
Flash memory test
Self-test
Not used
provides a number of system level controls
Execution Time
1.7 seconds
Not applicable
1 sample period
1 sample period
82 ms
1 sample period
Not applicable
1100 ms
53 ms
12 ms
N/A
Rev. 0 | Page 36 of 40
MEMORY MANAGEMENT
The data retention of the flash memory depends on the tempera-
ture and the number of write cycles. Figure 26 characterizes the
dependence on temperature, and the FLSHCNT_LOW and
FLSHCNT_HIGH registers (see Table 147 and Table 148)
provide a running count of flash write cycles. The flash updates
every time GLOB_CMD[6] or GLOB_CMD[3] is set to 1.
Table 147. FLSHCNT_LOW (Page 2, Base Address = 0x7C)
Bits
[15:0]
Table 148. FLSHCNT_HIGH (Page 2, Base Address = 0x7E)
Bits
[15:0]
Flash Memory Test
Turn to Page 3 (DIN = 0x8003), and then set GLOB_CMD[2] = 1
(DIN = 0x8204, DIN = 0x8300) to run a checksum test of the
internal flash memory, which compares a factory programmed
value with the current sum of the same memory locations. The
result of this test loads into SYS_E_FLAG[6]. Turn to Page 0
(DIN = 0x8000) and use DIN = 0x0800 to read SYS_E_FLAG.
600
450
300
150
0
30
Description
Binary counter; number of flash updates, lower word
Description
Binary counter; number of flash updates, upper word
40
Figure 26. Flash Memory Retention
55
JUNCTION TEMPERATURE (°C)
70
85
100
125
Data Sheet
135
150