AT45DB161D-SUSL383 Atmel, AT45DB161D-SUSL383 Datasheet - Page 34

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AT45DB161D-SUSL383

Manufacturer Part Number
AT45DB161D-SUSL383
Description
Flash, pin, soic, flash, Memory, Semiconductors and Actives, serial, bit
Manufacturer
Atmel
Datasheet
21.6
34
Figure 21-1. Atmel RapidS Mode
Reset Timing
Note:
SO (OUTPUT)
Atmel AT45DB161D
MOSI = Master Out, Slave In
MISO = Master In, Slave Out
The Master is the host controller and the Slave is the Atmel DataFlash
The Master always clocks data out on the rising edge of SCK and always clocks data in on the falling edge of SCK.
The Slave always clocks data out on the falling edge of SCK and always clocks data in on the rising edge of SCK.
Slave
A.
B.
C.
D.
E.
F.
G. Master clocks in first bit of BYTE-SO
H. Slave clocks out second bit of BYTE-SO
I.
SI (INPUT)
MOSI
MISO
SCK
Master clocks out first bit of BYTE-MOSI on the rising edge of SCK
Slave clocks in first bit of BYTE-MOSI on the next rising edge of SCK
Master clocks out second bit of BYTE-MOSI on the same rising edge of SCK
Last bit of BYTE-MOSI is clocked out from the Master
Last bit of BYTE-MOSI is clocked into the slave
Slave clocks out first bit of BYTE-SO
Master clocks in last bit of BYTE-SO
RESET
CS
The CS signal should be in the high state before the RESET signal is deasserted
SCK
CS
A
1
B
MSB
HIGH IMPEDANCE
C
2
3
4
BYTE-MOSI
5
6
7
D
8
E
LSB
F
1
G
MSB
2
H
3
t RST
t REC
4
HIGH IMPEDANCE
BYTE-SO
5
6
t CSS
7
3500N–DFLASH–05/10
8
I
LSB
1

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