93LC46B-I/MSG Microchip, 93LC46B-I/MSG Datasheet - Page 9

• Manufacturer Part Number: 93LC46B-I/MSG
• Description: ind, Semiconductors and Actives, serial, Memory
• Manufacturer: Microchip

2.8
The WRITE instruction is followed by 8 bits (If ORG is
low or A-version devices) or 16 bits (If ORG pin is high
or B-version devices) of data which are written into the
specified address. For 93AA46A/B/C and 93LC46A/B/
C devices, after the last data bit is clocked into DI, the
falling edge of CS initiates the self-timed auto-erase
and programming cycle. For 93C46A/B/C devices, the
self-timed auto-erase and programming cycle is
initiated by the rising edge of CLK on the last data bit.
FIGURE 2-8:
FIGURE 2-9:
 2003 Microchip Technology Inc.
CLK
CLK
CS
DO
CS
DO
DI
DI
WRITE
93AA46A/B/C, 93LC46A/B/C, 93C46A/B/C
1
1
HIGH-Z
HIGH-Z
WRITE TIMING FOR 93AA AND 93LC DEVICES
WRITE TIMING FOR 93C DEVICES
0
0
1
1
An
An
•••
•••
A0
A0
Dx
Dx
•••
•••
The DO pin indicates the READY/BUSY status of the
device, if CS is brought high after a minimum of 250 ns
low (T
is still in progress. DO at logical ‘1’ indicates that the
register at the specified address has been written with
the data specified and the device is ready for another
instruction.
Note:
D0
D0
CSL
T
T
CSL
CSL
). DO at logical ‘0’ indicates that programming
Twc
Issuing a Start bit and then taking CS low
will clear the READY/BUSY status from
DO.
Twc
BUSY
BUSY
T
T
SV
SV
READY
READY
DS21749D-page 9
HIGH-Z
HIGH-Z
T
T
CZ
CZ