ATMEGA16-16AU SL602 Atmel, ATMEGA16-16AU SL602 Datasheet - Page 81
ATMEGA16-16AU SL602
Manufacturer Part Number
ATMEGA16-16AU SL602
Description
Manufacturer
Atmel
Datasheet
1.ATMEGA16-16AU_SL602.pdf
(357 pages)
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Timer/Counter
Timing Diagrams
2466T–AVR–07/10
The Timer/Counter is a synchronous design and the timer clock (clk
clock enable signal in the following figures. The figures include information on when Interrupt
Flags are set.
shows the count sequence close to the MAX value in all modes other than phase correct PWM
mode.
Figure 34. Timer/Counter Timing Diagram, no Prescaling
Figure 35
Figure 35. Timer/Counter Timing Diagram, with Prescaler (f
Figure 36
TCNTn
TCNTn
(clk
(clk
TOVn
TOVn
clk
clk
clk
clk
I/O
I/O
I/O
Tn
I/O
Tn
/8)
/1)
shows the same timing data, but with the prescaler enabled.
shows the setting of OCF0 in all modes except CTC mode.
Figure 34
MAX - 1
MAX - 1
contains timing data for basic Timer/Counter operation. The figure
MAX
MAX
clk_I/O
BOTTOM
BOTTOM
/8)
T0
ATmega16(L)
) is therefore shown as a
BOTTOM + 1
BOTTOM + 1
81
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