83947AYILNT IDT, 83947AYILNT Datasheet - Page 12

• Manufacturer Part Number: 83947AYILNT
• Description: Clock Drivers & Distribution
• Manufacturer: IDT

Specifications of 83947AYILNT

• Rohs: yes
• Part # Aliases: ICS83947AYILNT

Differential Clock Input Interface
The CLK /nCLK accepts LVDS, LVPECL, LVHSTL, SSTL, HCSL
and other differential signals. Both signals must meet the V
V
examples for the CLK/nCLK input driven by the most common
driver types. The input interfaces suggested here are examples
Figure 2A. CLK/nCLK Input Driven by an
Figure 2C. CLK/nCLK Input Driven by a
Figure 2E. CLK/nCLK Input Driven by a
IDT™ / ICS™ LVCMOS/LVTTL CLOCK GENERATOR
CMR
ICS83948I-147
LOW SKEW, 1-TO-12 DIFFERENTIAL-TO-LVCMOS/LVTTL FANOUT BUFFER
3.3V
input requirements. Figures 2A to 2F show interface
1.8V
3.3V
HCSL
LVPECL
*Optional – R3 and R4 can be 0Ω
LVHSTL
IDT
LVHSTL Driver
IDT Open Emitter LVHSTL Driver
3.3V LVPECL Driver
3.3V HCSL Driver
*R3
*R4
Zo = 50Ω
Zo = 50Ω
Zo = 50Ω
Zo = 50Ω
33Ω
33Ω
Zo = 50Ω
Zo = 50Ω
R3
125Ω
R1
50Ω
3.3V
R1
84Ω
R1
50Ω
R4
125Ω
R2
50Ω
R2
84Ω
R2
50Ω
CLK
nCLK
CLK
nCLK
CLK
nCLK
3.3V
3.3V
3.3V
Differential
Input
Differential
Input
Differential
Input
PP
and
12
only. Please consult with the vendor of the driver component to
confirm the driver termination requirements. For example, in Figure
2A, the input termination applies for IDT open emitter LVHSTL
drivers. If you are using an LVHSTL driver from another vendor,
use their termination recommendation.
Figure 2B. CLK/nCLK Input Driven by a
Figure 2D. CLK/nCLK Input Driven by a
Figure 2F. CLK/nCLK Input Driven by a
2.5V
3.3V
3.3V
SSTL
LVDS
LVPECL
3.3V LVPECL Driver
3.3V LVDS Driver
2.5V SSTL Driver
Zo = 60Ω
Zo = 60Ω
Zo = 50Ω
Zo = 50Ω
ICS83948AYI-147 REV. D NOVEMBER 1, 2012
Zo = 50Ω
Zo = 50Ω
R3
120Ω
2.5V
R1
120Ω
R1
50Ω
R2
50Ω
R4
120Ω
R2
120Ω
R2
50Ω
R1
100Ω
CLK
nCLK
CLK
nCLK
CLK
nCLK
3.3V
3.3V
Differential
Input
3.3V
Differential
Input
Receiver