8545AG-02LFT IDT, 8545AG-02LFT Datasheet
8545AG-02LFT
Specifications of 8545AG-02LFT
Related parts for 8545AG-02LFT
8545AG-02LFT Summary of contents
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... CLK1 Pulldown CLK2 1 Pulldown CLK_SEL Pullup OE ICS8545AGI-02 REVISION A JULY 29, 2009 Features • Four differential LVDS output pairs • Two LVCMOS/LVTTL clock inputs to support redundant or selectable frequency fanout applications • Maximum output frequency: 350MHz • Translates LVCMOS/LVTTL input signals to LVDS levels • ...
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... IN R Input Pullup Resistor PULLUP R Input Pulldown Resistor PULLDOWN ICS8545AGI-02 REVISION A JULY 29, 2009 Type Description Power supply ground. Synchronizing clock enable. When HIGH, clock outputs follows clock input. When Pullup LOW, Qx outputs are forced low, nQx outputs are forced high. LVCMOS / LVTTL interface levels. ...
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... In the active mode, the state of the outputs are a function of the CLK1 and CLK2 inputs as described in Table 3B. Disabled CLK1, CLK2 CLK_EN nQ[0:3] Q[0:3] Figure 1. CLK_EN Timing Diagram Table 3B. Clock Input Function Table Inputs Outputs CLK1 or CLK2 Q0:Q3 0 LOW 1 HIGH ICS8545AGI-02 REVISION A JULY 29, 2009 Inputs CLK_SEL Selected Source X 0 CLK1 1 CLK2 0 CLK1 1 CLK2 nQ0:nQ3 HIGH LOW ...
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... Symbol Parameter V Differential Output Voltage OD ∆V V Magnitude Change Offset Voltage OS ∆V V Magnitude Change OS OS ICS8545AGI-02 REVISION A JULY 29, 2009 Rating 4.6V -0. 10mA 15mA 91.1°C/W (0 mps) -65°C to 150°C = 3.3V ± 5 -40°C to 85° Test Conditions = 3.3V ± 5 -40°C to 85° ...
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... NOTE 3: Defined as skew between outputs on different devices operating at the same supply voltages and with equal load conditions. Using the same type of inputs on each device, the outputs are measured at the differential cross points. NOTE 4: This parameter is defined in accordance with JEDEC Standard 65. NOTE 5: Measured using 50% duty cycle. ICS8545AGI-02 REVISION A JULY 29, 2009 = 3.3V ± 5 -40°C to 85°C A Test Conditions 155 ...
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... As with most timing specifications, phase noise measurements has issues relating to the limitations of the equipment. Often the noise floor of the equipment is higher than the noise floor of the device. This ICS8545AGI-02 REVISION A JULY 29, 2009 LOW SKEW, 1-TO-4 LVCMOS/LVTTL-TO-LVDS FANOUT BUFFER of the power in the 1Hz band to the power in the fundamental. When the required offset is specified, the phase noise is called a dBc value, which simply means dBm at a specified offset from the fundamental ...
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... Qy tsk(pp) Part-to-Part Skew nQ0:nQ3 Q0: PERIOD t PW odc = t PERIOD Output Duty Cycle/Pulse Width/Period ICS8545AGI-02 REVISION A JULY 29, 2009 SCOPE Qx nQ0:nQ3 nQx Differential Output Level nQx Qx nQy Qy Output Skew CLK1, CLK2 nQ0:nQ3 x 100% Propagation Delay 7 LOW SKEW, 1-TO-4 LVCMOS/LVTTL-TO-LVDS FANOUT BUFFER ...
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... ICS8545I-02 Data Sheet Parameter Measurement Information, continued nQ0:nQ3 80% 20% Q0: Output Rise/Fall Time V DD LVDS DC Input ➤ Offset Voltage Setup ICS8545AGI-02 REVISION A JULY 29, 2009 80 20% DC Input t F Differential Output Voltage Setup out ➤ out LOW SKEW, 1-TO-4 LVCMOS/LVTTL-TO-LVDS FANOUT BUFFER ...
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... For a multiple 3.3V LVDS Driver 100 Differential Transmission Line Figure 2. Typical LVDS Driver Termination ICS8545AGI-02 REVISION A JULY 29, 2009 Outputs: LVDS Outputs All unused LVDS output pairs can be either left floating or terminated with 100Ω across. If they are left floating, there should be no trace attached ...
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... This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type of board (multi-layer). θ Table 6. Thermal Resistance JA Meters per Second Multi-Layer PCB, JEDEC Standard Test Boards ICS8545AGI-02 REVISION A JULY 29, 2009 = 3. 3.465V, which gives worst case results 3.465V * 90mA = 311.85mW DD_MAX * Pd_total + T ...
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... Meters per Second Multi-Layer PCB, JEDEC Standard Test Boards Transistor Count The transistor count for ICS8545I-02 is: 360 Package Outline and Package Dimensions Package Outline - G Suffix for 20 Lead TSSOP ICS8545AGI-02 REVISION A JULY 29, 2009 LOW SKEW, 1-TO-4 LVCMOS/LVTTL-TO-LVDS FANOUT BUFFER θ by Velocity 91.1° ...
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... Any other applications, such as those requiring high reliability or other extraordinary environmental requirements are not recommended without additional processing by IDT. IDT reserves the right to change any circuitry or specifications without notice. IDT does not authorize or warrant any IDT product for use in life support devices or critical medical instruments. ICS8545AGI-02 REVISION A JULY 29, 2009 LOW SKEW, 1-TO-4 LVCMOS/LVTTL-TO-LVDS FANOUT BUFFER Package Shipping Packaging “ ...
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... IDT or any third parties. IDT’s products are not intended for use in life support systems or similar devices where the failure or malfunction of an IDT product can be reasonably expected to significantly affect the health or safety of users. Anyone using an IDT product in such a manner does so at their own risk, absent an express, written agreement by IDT ...