8545AG-02LFT IDT, 8545AG-02LFT Datasheet - Page 2

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8545AG-02LFT

Manufacturer Part Number
8545AG-02LFT
Description
Clock Drivers & Distribution
Manufacturer
IDT
Datasheet

Specifications of 8545AG-02LFT

Rohs
yes
Part # Aliases
ICS8545AG-02LFT
ICS8545I-02 Data Sheet
Table 1. Pin Descriptions
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
Table 2. Pin Characteristics
ICS8545AGI-02 REVISION A JULY 29, 2009
Symbol
C
R
R
IN
PULLUP
PULLDOWN
Number
1, 9, 13
10, 18
11, 12
14, 15
16, 17
19, 20
5, 7
2
3
4
6
8
Parameter
Input Capacitance
Input Pullup Resistor
Input Pulldown Resistor
CLK_SEL
CLK_EN
nQ3, Q3
nQ2, Q2
nQ1, Q1
nQ0, Q0
Name
CLK1
CLK2
GND
V
OE
nc
DD
Unused
Output
Output
Output
Output
Power
Power
Input
Input
Input
Input
Input
Type
Pulldown
Pulldown
Pulldown
Pullup
Pullup
Test Conditions
Description
Power supply ground.
Synchronizing clock enable. When HIGH, clock outputs follows clock input. When
LOW, Qx outputs are forced low, nQx outputs are forced high.
LVCMOS / LVTTL interface levels.
Clock select input. When HIGH, selects CLK2 input.
When LOW, selects CLK1 input. LVCMOS / LVTTL interface levels.
Single-ended clock input. LVCMOS/LVTTL interface levels.
No connect.
Single-ended clock input. LVCMOS/LVTTL interface levels.
Output enable. Controls enabling and disabling of outputs Q0/nQ0 through
Q3/nQ3. LVCMOS/LVTTL interface levels.
Positive supply pins.
Differential output pair. LVDS interface levels.
Differential output pair. LVDS interface levels.
Differential output pair. LVDS interface levels.
Differential output pair. LVDS interface levels.
2
LOW SKEW, 1-TO-4 LVCMOS/LVTTL-TO-LVDS FANOUT BUFFER
Minimum
Typical
©2009 Integrated Device Technology, Inc.
51
51
4
Maximum
Units
k
k
pF

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