LC4256V-75FT256AI Lattice, LC4256V-75FT256AI Datasheet - Page 41
LC4256V-75FT256AI
Manufacturer Part Number
LC4256V-75FT256AI
Description
CPLD - Complex Programmable Logic Devices ispJTAG 3.3V 7.5ns 256MC 128 I/O IND
Manufacturer
Lattice
Datasheet
1.LC4256V-75FT256AI.pdf
(99 pages)
Specifications of LC4256V-75FT256AI
Memory Type
EEPROM
Number Of Macrocells
256
Maximum Operating Frequency
178.57 MHz
Delay Time
7.5 ns
Number Of Programmable I/os
160
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 40 C
Package / Case
FTBGA
Mounting Style
SMD/SMT
Number Of Product Terms Per Macro
80
Factory Pack Quantity
450
Supply Current
12.5 mA
Supply Voltage - Max
3.6 V
Supply Voltage - Min
3 V
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Lattice Semiconductor
Switching Test Conditions
Figure 12 shows the output test load that is used for AC testing. The specific values for resistance, capacitance,
voltage, and other test conditions are shown in Table 11.
Figure 12. Output Test Load, LVTTL and LVCMOS Standards
Table 11. Test Fixture Required Components
LVCMOS I/O, (L -> H, H -> L)
LVCMOS I/O (Z -> H)
LVCMOS I/O (Z -> L)
LVCMOS I/O (H -> Z)
LVCMOS I/O (L -> Z)
1. C
L
includes test fixtures and probe capacitance.
Test Condition
DUT
106 106
106
106
R
1
106
106
R
2
V
R 1
R 2
41
CCO
35pF
35pF
35pF
5pF
5pF
C
L
ispMACH 4000V/B/C/Z Family Data Sheet
1
C L
LVCMOS 3.3 = 1.5V
LVCMOS 2.5 = V
LVCMOS 1.8 = V
1.5V
1.5V
V
V
OH
OL
+ 0.3
- 0.3
0213A/ispm4k
Timing Ref.
Point
Test
CCO
CCO
/2
/2
LVCMOS 3.3 = 3.0V
LVCMOS 2.5 = 2.3V
LVCMOS 1.8 = 1.65V
3.0V
3.0V
3.0V
3.0V
V
CCO
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