MAX159ACUA+T Maxim Integrated, MAX159ACUA+T Datasheet - Page 8

• Manufacturer Part Number: MAX159ACUA+T
• Description: Analog to Digital Converters - ADC 10-Bit 108ksps 5.25V Precision ADC
• Manufacturer: Maxim Integrated

Specifications of MAX159ACUA+T

• Rohs: yes
• Number Of Channels: 1
• Architecture: SAR
• Conversion Rate: 108 KSPs
• Resolution: 10 bit
• Input Type: Pseudo-Differential
• Snr: No
• Interface Type: QSPI, Serial (SPI, Microwire)
• Operating Supply Voltage: 2.7 V to 5.25 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: uMAX
• Maximum Power Dissipation: 727 mW
• Minimum Operating Temperature: 0 C
• Number Of Converters: 1
• Voltage Reference: 5.25 V

The capacitive digital-to-analog converter (DAC)
adjusts during the remainder of the conversion cycle
to restore node ZERO to 0V within the limits of 10-bit
resolution. This action is equivalent to transferring a
16pF · [(V
ry-weighted capacitive DAC, which in turn forms a digi-
tal representation of the analog input signal.
The ADC’s T/H stage enters its tracking mode on the
falling edge of CS/SHDN. For the MAX157 (single-
ended inputs), IN- is connected to GND and the con-
verter samples the positive (“+”) input. For the MAX159
(pseudo-differential inputs), IN- connects to the nega-
tive input (“-”), and the difference of [(V
sampled. At the end of the conversion, the positive
input connects back to IN+ and C
input signal.
The time required for the T/H stage to acquire an input
signal is a function of how fast its input capacitance is
charged. If the input signal’s source impedance is high,
the acquisition time lengthens and more time must be
allowed between conversions. The acquisition time,
t
the signal, and is also the minimum time required for
the signal to be acquired. Calculate this with the follow-
ing equation:
where R
R
input capacitance of the ADC. Source impedances
below 4kΩ have no significant impact on the AC perfor-
mance of the MAX157/MAX159.
+2.7V, Low-Power, 2-Channel,
108ksps, Serial 10-Bit ADCs in 8-Pin µMAX
Figure 2. MAX157/MAX159 Simplified Functional Diagram
8
ACQ
IN
CS/SHDN
SCLK
CH0
(CH+)
CH1
(CH-)
REF
( ) ARE FOR MAX159
_______________________________________________________________________________________
(9kΩ) is the input resistance, and C
, is the maximum time the device takes to acquire
S
(2 CHANNEL)
ANALOG
IN
is the source impedance of the input signal,
INPUT
MUX
+) - (V
t
ACQ
IN
CONTROL
-)] charge from C
LOGIC
T/H
= 7(R
IN
S
+ R
10+2 BIT
INTERNAL
SCLK
CLOCK
SAR
ADC
IN
OUT
HOLD
)C
IN
HOLD
IN
IN
charges to the
Track/Hold
REGISTER
+) - (V
OUTPUT
(16pF) is the
MAX157
MAX159
to the bina-
IN
DOUT
-)] is
Higher source impedances can be used if a 0.01µF
capacitor is connected to the individual analog inputs.
Together with the input impedance, this capacitor forms
an RC filter, limiting the ADC’s signal bandwidth.
The MAX157/MAX159 T/H stage offers both a 2.25MHz
small-signal and a 1MHz full-power bandwidth, which
makes it possible to use the parts for digitizing high-
speed transients and measuring periodic signals with
bandwidths exceeding the ADC’s sampling rate by
using undersampling techniques. To avoid high-fre-
quency signals being aliased into the frequency band
of interest, anti-alias filtering is recommended. Most
aliasing problems can be fixed easily with an external
resistor and a capacitor. However, if DC precision is
required, it is usually best to choose a continuous
or switched-capacitor filter, such as the MAX7410/
MAX7414 (Figure 4). Their Butterworth characteristic
generally provides the best compromise (with regard to
rolloff and attenuation) in filter configurations, is easy to
design, and provides a maximally flat passband re-
sponse.
Internal protection diodes, which clamp the analog
input to V
swing within GND - 300mV to V
damage. However, for accurate conversions both
inputs must not exceed V
GND - 50mV.
If an off-channel analog input voltage exceeds the
supplies, limit the input current to 4mA.
Figure 3. Analog Input Channel Structure
(CH+)
(CH-)
CH1
CH0
SINGLE-ENDED MODE: CHO, CH1 = IN+; GND = IN-
DIFFERENTIAL MODE: CH+ = IN+; CH- = IN-
GND
REF
C
SWITCH
DD
INPUT
MUX
and GND, allow each input channel to
CAPACITIVE DAC
–
C
16pF
HOLD
TRACK
+
T/H
Analog Input Protection
R
9k
IN
DD
ZERO
HOLD
+ 50mV or be less than
DD
Input Bandwidth
CONTROL
COMPARATOR
LOGIC
+ 300mV without
( ) ARE FOR MAX159
TO SAR