MAX1075ETC-T Maxim Integrated, MAX1075ETC-T Datasheet - Page 15

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MAX1075ETC-T

Manufacturer Part Number
MAX1075ETC-T
Description
Analog to Digital Converters - ADC
Manufacturer
Maxim Integrated
Datasheet

Specifications of MAX1075ETC-T

Number Of Channels
1
Architecture
SAR
Conversion Rate
1.8 MSPs
Resolution
10 bit
Input Type
Differential
Snr
No
Interface Type
3-Wire, Microwire, QSPI, Serial, SPI
Operating Supply Voltage
5 V
Maximum Operating Temperature
+ 85 C
Package / Case
TQFN EP
Maximum Power Dissipation
1349 mW
Minimum Operating Temperature
- 40 C
Number Of Converters
1
Voltage Reference
External
ters should be configured for late framing (LAFR = 1)
and for an active-low frame (LTFS = 1, LRFS = 1) signal.
This is also the best way to enter the power-down modes
by setting the word length to 8 bits (SLEN = 1001).
Connect the V
when the MAX1072/MAX1075 are operating with a sup-
ply voltage higher than the DSP supply voltage (see
Figures 17 and 18).
For best performance, use PC boards. Wire-wrap
boards are not recommended. Board layout should
ensure that digital and analog signal lines are separat-
ed from each other. Do not run analog and digital
(especially clock) lines parallel to one another, or digital
lines underneath the ADC package.
Figure 20 shows the recommended system ground
connections. Establish a single-point analog ground
(star ground point) at GND, separate from the logic
ground. Connect all other analog grounds and DGND
to this star ground point for further noise reduction. The
ground return to the power supply for this ground
should be low impedance and as short as possible for
noise-free operation.
High-frequency noise in the V
affect the ADC’s high-speed comparator. Bypass this
Figure 17. DSP Interface—Continuous Conversion
Figure 18. DSP Interface—Single-Conversion, Continuous/Burst Clock
CNVST
DOUT
SCLK
CNVST
DOUT
SCLK
S0
Layout, Grounding, and Bypassing
L
0
pin to the ADSP21_ _ _ supply voltage
1
______________________________________________________________________________________
0
1
0
0
0
0
1.8Msps, Single-Supply, Low-Power,
D9
DD
0
D8
power supply can
D9
D7
D8
D6
True-Differential, 10-Bit ADCs
D5
D7
D4
D6
D3
D5
supply to the single-point analog ground with 0.01µF
and 10µF bypass capacitors. Minimize capacitor lead
lengths for best supply-noise rejection.
Integral nonlinearity (INL) is the deviation of the values on
an actual transfer function from a straight line. This
straight line can be either a best-straight-line fit or a line
drawn between the end points of the transfer function,
once offset and gain errors have been nullified. The static
linearity parameters for the MAX1072/MAX1075 are mea-
sured using the end-points method.
Differential nonlinearity (DNL) is the difference between
an actual step width and the ideal value of 1 LSB. A DNL
error specification of 1 LSB or less guarantees no missing
codes and a monotonic transfer function.
Aperture jitter (t
the time between the samples.
Aperture delay (t
falling edge of CNVST and the instant when an actual
sample is taken.
D2
D4
D1
D0
D3
S1
AJ
D2
AD
) is the sample-to-sample variation in
S0
) is the time defined between the
D1
0
Differential Nonlinearity
D0
Integral Nonlinearity
S1
Aperture Delay
Aperture Jitter
Definitions
S0
1
0
0
0
1
0
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