MAX114CAG-T Maxim Integrated, MAX114CAG-T Datasheet - Page 6
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MAX114CAG-T
Manufacturer Part Number
MAX114CAG-T
Description
Analog to Digital Converters - ADC
Manufacturer
Maxim Integrated
Datasheet
1.MAX118CPI.pdf
(12 pages)
Specifications of MAX114CAG-T
Number Of Channels
4
Architecture
Half-Flash
Conversion Rate
1000 KSPs
Resolution
8 bit
Input Type
Single-Ended
Snr
Yes
Interface Type
Parallel
Operating Supply Voltage
4.75 V to 5.25 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Package / Case
SSOP-24
Maximum Power Dissipation
640 mW
Minimum Operating Temperature
0 C
Number Of Converters
2
Voltage Reference
External
+5V, 1Msps, 4 & 8-Channel,
8-Bit ADCs with 1µA Power-Down
6
______________________________________________________________Pin Description
17, 18, 19
MAX114
7, 8, 9
_______________________________________________________________________________________
10
11
12
13
14
15
16
20
21
22
23
24
—
—
—
—
1
2
3
4
5
6
PIN
19, 20, 21
MAX118
9, 10, 11
12
13
14
15
16
17
18
22
23
24
25
26
27
28
1
2
3
4
5
6
7
8
D1, D2, D3
D4, D5, D6
WR/RDY
PWRDN
NAME
MODE
REF+
GND
REF-
V
IN6
IN5
IN4
IN3
IN2
IN1
INT
IN7
RD
D0
CS
D7
A2
A1
A0
DD
Analog Input Channel 6
Analog Input Channel 5
Analog Input Channel 4
Analog Input Channel 3
Analog Input Channel 2
Analog Input Channel 1
Mode Selection Input. Internally pulled low with a 50µA current source. MODE = 0 acti-
vates read mode; MODE = 1 activates write-read mode (see Digital Interface Section).
Three-State Data Output (LSB)
Three-State Data Outputs
Read Input. RD must be low to access data (see Digital Interface section).
Interrupt Output. INT goes low to indicate end of conversion (see Digital Interface
section).
Ground
Lower Limit of Reference Span. REF- sets the zero-code voltage. Range is GND ≤
V
Upper Limit of Reference Span. REF+ sets the full-scale input voltage. Range is V
< V
Write-Control Input/Ready-Status Output (see Digital Interface section)
Chip-Select Input. CS must be low for the device to recognize WR or RD inputs.
Three-State Data Outputs
Three-State Data Output (MSB)
Multiplexer Channel Address Input (MSB)
Multiplexer Channel Address Input
Multiplexer Channel Address Input (LSB)
Power-Down Input. PWRDN reduces supply current when low.
Positive Supply, +5V
Analog Input Channel 7
REF-
REF+
< V
≤ V
REF+
DD
.
. Internally hard-wired to IN8 (Table 1).
FUNCTION
REF-