S9S12GN16F0CFT Freescale Semiconductor, S9S12GN16F0CFT Datasheet - Page 380

• Manufacturer Part Number: S9S12GN16F0CFT
• Description: 16-bit Microcontrollers - MCU 16-bit16k Flash 2k RAM
• Manufacturer: Freescale Semiconductor

Specifications of S9S12GN16F0CFT

• Rohs: yes
• Core: S12
• Processor Series: MC9S12G
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 25 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 1024 B
• On-chip Adc: Yes
• Operating Supply Voltage: 3.13 V to 5.5 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: TSSOP-20
• Mounting Style: SMD/SMT

S12 Clock, Reset and Power Management Unit (S12CPMU)
10.3.2.8
This register selects the time-out period for the Real Time Interrupt.
The clock source for the RTI is either IRCCLK or OSCCLK depending on the setting of the RTIOSCSEL
bit. In Stop Mode with PSTP=1 (Pseudo Stop Mode) and RTIOSCSEL=1 the RTI continues to run, else
the RTI counter halts in Stop Mode.
Read: Anytime
Write: Anytime
382
0x003B
RTR[6:4]
RTR[3:0]
RTDEC
Reset
Field
6–4
3–0
7
W
R
RTDEC
Decimal or Binary Divider Select Bit — RTDEC selects decimal or binary based prescaler values.
0 Binary based divider value. See
1 Decimal based divider value. See
Real Time Interrupt Prescale Rate Select Bits — These bits select the prescale rate for the RTI. See
Table 10-10
Real Time Interrupt Modulus Counter Select Bits — These bits select the modulus counter target value to
provide additional
CPMURTI register.
S12CPMU RTI Control Register (CPMURTI)
0
7
A write to this register starts the RTI time-out period. A change of the
RTIOSCSEL bit (writing a different value or loosing UPOSC status)
re-starts the RTI time-out period.
and
RTR6
Figure 10-11. S12CPMU RTI Control Register (CPMURTI)
0
6
Table
granularity.Table 10-10
10-11.
Table 10-9. CPMURTI Field Descriptions
MC9S12G Family Reference Manual,
RTR5
0
5
Table 10-10
Table 10-11
and
RTR4
NOTE
0
4
Table 10-11
Description
RTR3
show all possible divide values selectable by the
0
3
Rev.1.23
RTR2
0
2
Freescale Semiconductor
RTR1
0
1
RTR0
0
0