S9S12G128F0VLLR Freescale Semiconductor, S9S12G128F0VLLR Datasheet - Page 203

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S9S12G128F0VLLR

Manufacturer Part Number
S9S12G128F0VLLR
Description
16-bit Microcontrollers - MCU 16BIT 128K FLASH
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S9S12G128F0VLLR

Rohs
yes
Core
S12
Processor Series
MC9S12G
Data Bus Width
16 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
128 KB
Data Ram Size
8192 B
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-100
Mounting Style
SMD/SMT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
S9S12G128F0VLLR
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
1
2.4.3.1
2.4.3.2
Freescale Semiconductor
Address 0x0000 (G1)
Address 0x0000 (G2, G3)
Address 0x0001 (G1)
Address 0x0001 (G2, G3)
Read: Anytime. The data source is depending on the data direction value.
Write: Anytime
Field
Reset
Reset
Reset
Reset
7-0
PA
W
W
W
W
R
R
R
R
Port A general-purpose input/output data—Data Register
The associated pin can be used as general-purpose I/O. In general-purpose output mode the port data register bit
value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port data register bit, otherwise the
buffered pin input state is read.
PB7
PA7
Port A Data Register (PORTA)
0
0
0
Port B Data Register (PORTB)
0
0
0
7
7
7
7
PB6
PA6
0
0
0
0
0
0
6
6
6
6
Table 2-22. PORTA Register Field Descriptions
Figure 2-2. Port A Data Register (PORTA)
Figure 2-3. Port B Data Register (PORTB)
MC9S12G Family Reference Manual, Rev.1.23
PB5
PA5
0
0
0
0
0
0
5
5
5
5
PB4
PA4
0
0
0
0
0
0
4
4
4
4
Description
PB3
PA3
3
0
3
0
0
3
0
3
0
0
PB2
PA2
0
0
0
0
0
0
2
2
2
2
Port Integration Module (S12GPIMV1)
Access: User read/write
Access: User read/write
PA1
PB1
Access: User read only
Access: User read only
0
0
0
0
0
0
1
1
1
1
PA0
PB0
0
0
0
0
0
0
0
0
0
0
205
1
1

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