74F181PC Fairchild Semiconductor, 74F181PC Datasheet

IC ARITHMETIC LOGIC 4BIT 24-DIP

74F181PC

Manufacturer Part Number
74F181PC
Description
IC ARITHMETIC LOGIC 4BIT 24-DIP
Manufacturer
Fairchild Semiconductor
Series
74Fr
Datasheet

Specifications of 74F181PC

Logic Type
Arithmetic Logic Unit
Supply Voltage
4.5 V ~ 5.5 V
Number Of Bits
4
Operating Temperature
0°C ~ 70°C
Mounting Type
Through Hole
Package / Case
24-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74F181

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74F181PC
Manufacturer:
NS/国半
Quantity:
20 000
Part Number:
74F181PCQR
Manufacturer:
C&D
Quantity:
2
© 2004 Fairchild Semiconductor Corporation
74F181PC
74F181SPC
74F181
4-Bit Arithmetic Logic Unit
General Description
The 74F181 is a 4-bit Arithmetic logic Unit (ALU) which can
perform all the possible 16 logic operations on two vari-
ables and a variety of arithmetic operations. It is 40% faster
than the Schottky ALU and only consumes 30% as much
power.
Ordering Code:
Logic Symbols
Order Number
Active-HIGH Operands
Active-LOW Operands
Package Number
IEEE/IEC
N24C
N24A
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-011, 0.600" Wide
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
DS009491
Features
Connection Diagram
Full lookahead for high-speed arithmetic operation on
long words
Package Description
April 1988
Revised January 2004
www.fairchildsemi.com

Related parts for 74F181PC

74F181PC Summary of contents

Page 1

... It is 40% faster than the Schottky ALU and only consumes 30% as much power. Ordering Code: Order Number Package Number 74F181PC N24A 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-011, 0.600" Wide 74F181SPC N24C 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide ...

Page 2

Unit Loading/Fan Out Pin Names A –A A Operand Inputs (Active LOW –B B Operand Inputs (Active LOW –S Function Select Inputs Mode Control Input C Carry Input n F –F ...

Page 3

Operation Table a. All Input Data Inverted b. All Input Data True Logic Arithmetic Inactive minus ...

Page 4

Operation Table (Continued All Input Data Inverted; B Input Data True d. A Input Data True; B Input Date Inverted www.fairchildsemi.com Logic Arithmetic Inactive ...

Page 5

Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays www.fairchildsemi.com ...

Page 6

Absolute Maximum Ratings Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias V Pin Potential to Ground Pin CC Input Voltage (Note 3) Input Current (Note 5.0 mA Voltage Applied to Output in HIGH State ...

Page 7

AC Electrical Characteristics Symbol Parameter Path Mode t Propagation Delay PLH PHL Propagation Delay PLH Sum PHL Propagation Delay PLH ...

Page 8

Physical Dimensions inches (millimeters) unless otherwise noted 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-011, 0.600" Wide www.fairchildsemi.com Package Number N24A 8 ...

Page 9

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...

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