74F181SPC Fairchild Semiconductor, 74F181SPC Datasheet
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74F181SPC
Specifications of 74F181SPC
Related parts for 74F181SPC
74F181SPC Summary of contents
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... Ordering Code: Order Number Package Number 74F181PC N24A 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-011, 0.600" Wide 74F181SPC N24C 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Logic Symbols Active-HIGH Operands Active-LOW Operands IEEE/IEC © 2004 Fairchild Semiconductor Corporation ...
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Unit Loading/Fan Out Pin Names A –A A Operand Inputs (Active LOW –B B Operand Inputs (Active LOW –S Function Select Inputs Mode Control Input C Carry Input n F –F ...
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Operation Table a. All Input Data Inverted b. All Input Data True Logic Arithmetic Inactive minus ...
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Operation Table (Continued All Input Data Inverted; B Input Data True d. A Input Data True; B Input Date Inverted www.fairchildsemi.com Logic Arithmetic Inactive ...
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Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays www.fairchildsemi.com ...
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Absolute Maximum Ratings Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias V Pin Potential to Ground Pin CC Input Voltage (Note 3) Input Current (Note 5.0 mA Voltage Applied to Output in HIGH State ...
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AC Electrical Characteristics Symbol Parameter Path Mode t Propagation Delay PLH PHL Propagation Delay PLH Sum PHL Propagation Delay PLH ...
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Physical Dimensions inches (millimeters) unless otherwise noted 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-011, 0.600" Wide www.fairchildsemi.com Package Number N24A 8 ...
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...