74F181SPC Fairchild Semiconductor, 74F181SPC Datasheet - Page 2
![IC ARITHMETIC LOGIC 4BIT 24-DIP](/photos/6/89/68902/261-24-dip_sml.jpg)
74F181SPC
Manufacturer Part Number
74F181SPC
Description
IC ARITHMETIC LOGIC 4BIT 24-DIP
Manufacturer
Fairchild Semiconductor
Series
74Fr
Datasheet
1.74F181PC.pdf
(9 pages)
Specifications of 74F181SPC
Logic Type
Arithmetic Logic Unit
Supply Voltage
4.5 V ~ 5.5 V
Number Of Bits
4
Operating Temperature
0°C ~ 70°C
Mounting Type
Through Hole
Package / Case
24-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
www.fairchildsemi.com
Unit Loading/Fan Out
Note 1: OC-Open Collector
Functional Description
The 74F181 is a 4-bit high-speed parallel Arithmetic Logic
Unit (ALU). Controlled by the four Function Select inputs
(S
the 16 possible logic operations or 16 different arithmetic
operations on Active HIGH or Active LOW operands. The
Function Table lists these operations.
When the Mode Control input (M) is HIGH, all internal car-
ries are inhibited and the device performs logic operations
on the individual bits as listed. When the Mode Control
input is LOW, the carries are enabled and the device per-
forms arithmetic operations on the two 4-bit words. The
device incorporates full internal carry lookahead and pro-
vides for either ripple carry between devices using the
C
using the signals P (Carry Propagate) and G (Carry Gener-
ate). In the Add mode, P indicates that F is 15 or more,
while G indicates that F is 16 or more. In the Subtract mode
P indicates that F is zero or less, while G indicates that F is
less than zero. P and G are not affected by carry in. When
speed requirements are not stringent, the 74F181 can be
used in a simple Ripple Carry mode by connecting the
Carry output (C
next unit. For high speed operation the device is used in
conjunction with a carry lookahead circuit. One carry looka-
head package is required for each group of four 74F181
n
0
–S
4
3
output, or for carry lookahead between packages
) and the Mode Control input (M), it can perform all
A
B
S
M
C
F
A
G
P
C
0
0
0
0
n
n
Pin Names
n
–A
–B
–S
–F
B
4) signal to the Carry input (C
4
3
3
3
3
A Operand Inputs (Active LOW)
B Operand Inputs (Active LOW)
Function Select Inputs
Mode Control Input
Carry Input
Function Outputs (Active LOW)
Comparator Output
Carry Generate Output (Active LOW)
Carry Propagate Output (Active LOW)
Carry Output
Description
n
) of the
2
devices. Carry lookahead can be provided at various levels
and offers high speed capability over extremely long word
lengths.
The A
F outputs are HIGH and can be used to indicate logic
equivalence over four bits when the unit is in the Subtract
mode. The A
AND with other A
more than four bits. The A
the C
The Function Table lists the arithmetic operations that are
performed without a carry in. An incoming carry adds a one
to each operation. Thus, select code LHHL generates A
minus B minus 1 (2s complement notation) without a carry
in and generates A minus B when a carry is applied.
Because subtraction is actually performed by complemen-
tary addition (1s complement), a carry out means borrow;
thus a carry is generated when there is no underflow and
no carry is generated when there is underflow. As indi-
cated, this device can be used with either active LOW
inputs producing active LOW outputs or with active HIGH
inputs producing active HIGH outputs. For either case the
table lists the operations that are performed to the oper-
ands labeled inside the logic symbol.
n 4
B output from the device goes HIGH when all four
signal to indicate A
OC (Note 1)/33.3
HIGH/LOW
50/33.3
50/33.3
50/33.3
50/33.3
1.0/3.0
1.0/3.0
1.0/4.0
1.0/1.0
1.0/5.0
B output is open collector and can be wired
U.L.
B outputs to give a comparison for
B signal can also be used with
Output I
20 A/ 1.8 mA
20 A/ 1.8 mA
20 A/ 2.4 mA
20 A/ 0.6 mA
20 A/ 3.0 mA
(Note 1)/20 mA
B and A
Input I
1 mA/20 mA
1 mA/20 mA
1 mA/20 mA
1 mA/20 mA
IH
OH
/I
B.
/I
IL
OL