M4-96/96-20YI Lattice, M4-96/96-20YI Datasheet - Page 18

• Manufacturer Part Number: M4-96/96-20YI
• Description: CPLD - Complex Programmable Logic Devices HI PERF E2CMOS PLD
• Manufacturer: Lattice

Specifications of M4-96/96-20YI

• Product Category: CPLD - Complex Programmable Logic Devices
• Number Of Macrocells: 96
• Delay Time: 20 nS
• Number Of Programmable I/os: 400
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Package / Case: PQFP-144
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 24

Input Switch Matrix
The input switch matrix (Figures 12 and 13) optimizes routing of inputs to the central switch matrix.
Without the input switch matrix, each input and feedback signal has only one way to enter the central switch
matrix. The input switch matrix provides additional ways for these signals to enter the central switch matrix.
From Input Cell
17466G-002
17466G-003
Figure 12. ispMACH 4A with 2:1 Macrocell-I/O Cell
Figure 13. ispMACH 4A with 1:1 Macrocell-I/O Cell
Ratio - Input Switch Matrix
Ratio - Input Switch Matrix
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ispMACH 4A Family