S9S12G128F0CLFR Freescale Semiconductor, S9S12G128F0CLFR Datasheet - Page 1043
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S9S12G128F0CLFR
Manufacturer Part Number
S9S12G128F0CLFR
Description
16-bit Microcontrollers - MCU 16BIT 128K FLASH
Manufacturer
Freescale Semiconductor
Datasheet
1.S9S12GN16F0CFT.pdf
(1292 pages)
Specifications of S9S12G128F0CLFR
Rohs
yes
Core
S12
Processor Series
S12G128
Data Bus Width
16 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
128 KB
Data Ram Size
8 KB
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
LQFP-48
Mounting Style
SMD/SMT
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
S9S12G128F0CLFR
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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All bits in the FCLKDIV register are readable, bit 7 is not writable, bit 6 is write-once-hi and controls the
writability of the FDIV field in normal mode. In special mode, bits 6-0 are writable any number of times
but bit 7 remains unwritable.
Freescale Semiconductor
FDIVLCK
FDIV[5:0]
FDIVLD
Offset Module Base + 0x0000
Reset
Field
5–0
7
6
W
R
FDIVLD
Clock Divider Loaded
0 FCLKDIV register has not been written since the last reset
1 FCLKDIV register has been written since the last reset
Clock Divider Locked
0 FDIV field is open for writing
1 FDIV value is locked and cannot be changed. Once the lock bit is set high, only reset can clear this bit and
Clock Divider Bits — FDIV[5:0] must be set to effectively divide BUSCLK down to 1 MHz to control timed events
during Flash program and erase algorithms.
BUSCLK frequency. Please refer to
0
7
restore writability to the FDIV field in normal mode.
The FCLKDIV register should never be written while a Flash command is
executing (CCIF=0).
FDIVLCK
= Unimplemented or Reserved
0
6
Figure 29-5. Flash Clock Divider Register (FCLKDIV)
MC9S12G Family Reference Manual, Rev.1.23
Table 29-7. FCLKDIV Field Descriptions
0
5
Section 29.4.4, “Flash Command Operations,”
CAUTION
Table 29-8
0
4
Description
shows recommended values for FDIV[5:0] based on the
0
3
FDIV[5:0]
128 KByte Flash Module (S12FTMRG128K1V1)
0
2
for more information.
0
1
0
0
1045
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