MAX1254AEUE+ Maxim Integrated, MAX1254AEUE+ Datasheet - Page 14

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MAX1254AEUE+

Manufacturer Part Number
MAX1254AEUE+
Description
Analog to Digital Converters - ADC
Manufacturer
Maxim Integrated
Datasheet

Specifications of MAX1254AEUE+

Number Of Channels
10
Architecture
SAR
Conversion Rate
94 KSPs
Resolution
12 bit
Input Type
Single-Ended/Differential
Interface Type
Serial
Operating Supply Voltage
4.5 V to 5.5 V
Number Of Converters
1
Voltage Reference
Internal 4.096 V or External
Stand-Alone, 10-Channel, 12-Bit System Monitors
with Internal Temperature Sensor and V
Figure 6. Detailed Serial Interface Timing Diagram
Clock pulses on SCLK shift data into DIN on the rising
edge of the SCLK and out of DOUT on the falling edge
of SCLK.
Data transfers require a logic low on CS. A high-to-low
transition of CS marks the beginning of a data transfer. A
logic high on CS at any time resets the serial interface.
See Figure 6 and the Timing Characteristics table for
detailed serial-interface timing information.
Serial communications always begin with an 8-bit com-
mand word, serially loaded from DIN. A high-to-low
transition on CS initiates the data input operation. The
command word and the subsequent data bytes (for
write operations) are clocked from DIN into the
MAX1253/MAX1254 on the rising edges of SCLK. The
first rising edge on SCLK, after CS goes low, clocks in
the MSB of the command word (see the Command
Word section). The next seven rising edges on SCLK
complete the loading of the command word into the
internal command register. After the 8-bit command
word is entered, transfer 0 to 20 bytes of data, depend-
ing on the command. Table 2 shows the number of
data bytes for each command.
Table 1. Command Word
14
Command B3
CS
SCLK
DIN
DOUT
B7 (MSB)
______________________________________________________________________________________
HIGH-Z
Command B2
t
t
CSS
DOE
t
DS
B6
t
DH
t
CL
Command B1
Input Data Format
B5
t
CH
Command B0
B4
Address B3
Output data from the MAX1253/MAX1254 is clocked
onto DOUT on the falling edge of SCLK. Single-ended
and unipolar differential measurements are output in
straight binary MSB first, with two 8-bytes-per-conver-
sion result, and the last 4 bits padded with zeros. For
temperature and bipolar differential voltage measure-
ments, the output is two’s complement binary in the
same 2-byte format. The MSB of the output data from a
read command transitions at DOUT after the falling
edge of the 8th SCLK clock pulse following the CS
high-to-low transition. Table 2 shows the number of
bytes to be read from DOUT for a given read com-
mand.
The command word (Table 1) controls all serial com-
munications and configuration of the MAX1253/
MAX1254, providing access to the 44 on-chip registers.
The first 4 MSBs of the command word specify the
command (Table 2), while the last 4 bits provide
address information.
The first rising edge on SCLK, after CS goes low, trans-
fers the command word MSB into DIN. The next seven
rising edges on SCLK shift the remaining 7 bits into the
internal command register (see the Serial Digital
Interface section).
t
CP
B3
t
DOV
Address B2
B2
t
Address B1
CSH
DD
Output Data Format
B1
t
DOD
Command Word
Monitor
t
CSW
HIGH-Z
Address B0
B0 (LSB)

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