MAX1062CCUB-T Maxim Integrated, MAX1062CCUB-T Datasheet - Page 10

• Manufacturer Part Number: MAX1062CCUB-T
• Description: Analog to Digital Converters - ADC
• Manufacturer: Maxim Integrated

Specifications of MAX1062CCUB-T

• Number Of Channels: 1
• Architecture: SAR
• Conversion Rate: 200 KSPs
• Resolution: 14 bit
• Input Type: Single-Ended
• Snr: 84 dB
• Interface Type: QSPI, Serial (SPI, Microwire)
• Operating Supply Voltage: 2.7 V to 5.25 V, 5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: uMAX
• Maximum Power Dissipation: 444 mW
• Minimum Operating Temperature: 0 C
• Number Of Converters: 1
• Voltage Reference: 4.096 V

The data output from the MAX1062 is binary and Figure
8 depicts the nominal transfer function. Code transitions
occur halfway between successive-integer LSB values
(V
The MAX1062 requires an external reference with a
voltage range between 3.8V and AV
external reference directly to REF. Bypass REF to
AGND (pin 3) with a 4.7µF capacitor. When not using a
low ESR bypass capacitor, use a 0.1µF ceramic capac-
itor in parallel with the 4.7µF capacitor. Noise on the
reference degrades conversion accuracy.
The input impedance at REF is 40kΩ for DC currents.
During a conversion the external reference at REF must
deliver 100µA of DC load current and have an output
impedance of 10Ω or less.
For optimal performance, buffer the reference through
an op amp and bypass the REF input. Consider the
MAX1062’s equivalent input noise (80µV
choosing a reference.
Most applications require an input buffer amplifier to
achieve 14-bit accuracy. If the input signal is multi-
plexed, switch the input channel immediately after acqui-
sition, rather than near the end of or after a conversion
(Figure 9). This allows the maximum time for the input
buffer amplifier to respond to a large step change in the
input signal. The input amplifier must have a slew rate of
at least 2V/µs to complete the required output voltage
change before the beginning of the acquisition time.
14-Bit, +5V, 200ksps ADC with 10µA Shutdown
Figure 7. Shutdown Sequence
10
REF
______________________________________________________________________________________
= 4.096V and 1LSB = 250µV or 4.096V/16384).
Applications Information
DOUT
CS
External Reference
Output Coding and
Transfer Function
CONVERSION 0
POWERED UP
DD
Input Buffer
. Connect the
RMS
COMPLETE CONVERSION SEQUENCE
POWERED DOWN
) when
At the beginning of the acquisition, the internal sampling
capacitor array connects to AIN (the amplifier output),
causing some output disturbance. Ensure that the sam-
pled voltage has settled before the end of the acquisition
time.
Digital noise can couple to AIN and REF. The conver-
sion clock (SCLK) and other digital signals active dur-
ing input acquisition contribute noise to the conversion
result. Noise signals synchronous with the sampling
interval result in an effective input offset. Asynchronous
signals produce random noise on the input, whose
Figure 8. Unipolar Transfer Function, Full Scale (FS) = V
Zero Scale (ZS) = GND
11 . . . 111
11 . . . 110
00 . . . 011
00 . . . 010
11 . . . 101
00 . . . 001
00 . . . 000
OUTPUT CODE
0
1
2
INPUT VOLTAGE (LSB)
CONVERSION 1
3
POWERED UP
FULL-SCALE
TRANSITION
FS - 3/2LSB
Digital Noise
1LSB =
FS = V
FS
REF
16384
V
REF
REF
,