MAX5580AETP-T Maxim Integrated, MAX5580AETP-T Datasheet - Page 6

• Manufacturer Part Number: MAX5580AETP-T
• Description: Digital to Analog Converters - DAC
• Manufacturer: Maxim Integrated

Specifications of MAX5580AETP-T

• Number Of Converters: 4
• Resolution: 12 bit
• Interface Type: QSPI, SPI, Serial (3-Wire, Microwire)
• Supply Voltage - Max: 5.25 V
• Supply Voltage - Min: 2.7 V

Buffered, Fast-Settling, Quad,
12-/10-/8-Bit, Voltage-Output DACs
TIMING CHARACTERISTICS—DSP Mode Disabled (3V, 3.3V, 5V Logic) (Figure 1)
(DV DD = 2.7V to 5.25V, AGND = DGND = 0, T A = T MIN to T MAX , unless otherwise noted.)
6
SCLK Frequency
SCLK Pulse-Width High
SCLK Pulse-Width Low
CS Fall to SCLK Rise Setup Time
SCLK Rise to CS Rise Hold Time
SCLK Rise to CS Fall Setup Time
DIN to SCLK Rise Setup Time
DIN to SCLK Rise Hold Time
SCLK Rise to DOUTDC1 Valid
Propagation Delay
SCLK Fall to DOUT_ Valid
Propagation Delay
CS Rise to SCLK Rise Hold Time
CS Pulse-Width High
UPIO_ TIMING CHARACTERISTICS
DOUT Tri-State Time when Exiting
DOUTDC0, DOUTDC1, and UPIO
Modes
DOUTRB Tri-State Time from CS
Rise
DOUTRB Tri-State Enable Time
from 8th SCLK Rise
LDAC Pulse-Width Low
LDAC Effective Delay
CLR, MID, SET Pulse-Width Low
GPO Output Settling Time
GPO Output High-Impedance
Time
_______________________________________________________________________________________
PARAMETER
SYMBOL
f
t
t
t
t
t
t
t
SCLK
t
t
t
DRBZ
t
t
t
t
CSW
t
CSH
t
DO1
DO2
DOZ
CMS
t
CSS
CS0
t
CS1
ZEN
t
GPZ
LDL
LDS
CH
DH
CL
DS
GP
2.7V < DV
(Note 7)
(Note 7)
C
C
mode
MICROWIRE and SPI modes 0 and 3
C
in high impedance
C
in high impedance
C
UPIO_ driven out of tri-state
Figure 5
Figure 6
Figure 5
Figure 6
L
L
L
L
L
= 20pF, UPIO_ = DOUTDC1 mode
= 20pF, UPIO_ = DOUTDC0 or DOUTRB
= 20pF, from end of write cycle to UPIO_
= 20pF, from rising edge of CS to UPIO_
= 20pF, from 8th rising edge of SCLK to
DD
< 5.25V
CONDITIONS
MIN
100
20
20
10
10
12
10
45
20
20
5
5
0
TYP
MAX
100
100
100
20
30
30
20
UNITS
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns