MAX5331UCB+C1Z Maxim Integrated, MAX5331UCB+C1Z Datasheet - Page 10

• Manufacturer Part Number: MAX5331UCB+C1Z
• Description: Digital to Analog Converters - DAC
• Manufacturer: Maxim Integrated

Specifications of MAX5331UCB+C1Z

• Number Of Converters: 1
• Resolution: 12 bit
• Interface Type: QSPI, SPI, Serial (3-Wire, Microwire)
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: TQFP EP
• Minimum Operating Temperature: 0 C

12-Bit DACs with 32-Channel
Sample-and-Hold Outputs
combinations of negative and positive power-supply
voltages. The nominal, usable DAC end-point codes for
the selected power supplies can be calculated as:
The resistive voltage-divider formed by the output resis-
tor (R
put voltage. Determine V
The MAX5331/MAX5332/MAX5333 include a ground-
sense input (GS), which allows the output voltages to
be referenced to a remote ground. The voltage at GS is
added to the output voltage with unity gain. Note that
the resulting output voltage must be within the valid
output voltage range set by the power supplies.
Figure 4. Input-Word Sequence
10
Figure 3. Analog Block Diagram
D11 D10 D9
Lower end-point code = 2048 - ((2.5V - (V
MSB
Upper end-point code = 2048 + ((V
______________________________________________________________________________________
O
) and the load impedance (R
Scaling factor
V
OUT
D8
_
3.2mV) (result ≤ 4095)
=
3.2mV) (result ≥ 0)
DATA
V
DAC
GS
REF
V
D7
CHOLD
OUT_
D6
=
R
12-BIT
×
DAC
L
as follows:
scaling factor
D5
R
+
L
R
D4
O
DATA
L
DD
Ground Sense
), scales the out-
D3
- 2.4 - 2.5V) /
SS
D2
OFFSET
+ 0.75) /
GAIN
AND
D1
D0
S3
0
C
The MAX5331/MAX5332/MAX5333 clamp the output
between two externally applied voltages. Internal
diodes at each channel restrict the output voltage to:
The clamping diodes allow the MAX5331/MAX5332/
MAX5333 to drive devices with restricted input ranges.
The diodes also allow the outputs to be clamped during
power-up or fault conditions. To disable output clamping,
connect CH to V
voltages beyond the maximum output voltage range.
The MAX5331/MAX5332/MAX5333 are controlled by an
SPI-/QSPI-/MICROWIRE-compatible 3-wire interface.
Serial data is clocked into the 24-bit shift register in an
MSB-first format, with the 12-bit DAC data and S3–S0
(all zeros) preceding the 5-bit SRAM address, 2-bit
control, and a fill zero (Figure 4). The input word is
framed by CS. The first rising edge of SCLK after CS
goes low clocks in the MSB of the input word.
HOLD
S2
ONE OF 32 SHA CHANNELS
0
S1
A
0
(
V
V
= 1
CH
S0
0
+
DD
R
A4
0 7
O
.
and CL to V
V
)
A3
≥
ADDRESS
V
OUT
A2
CH
CL
_
R
SS
L
OUT_
≥
A1
, setting the clamping
(
V
Serial Interface
CL
A0
Output Clamp
−
C1
0 7
CONTROL
.
V
)
C0
LSB
0
0