AT24MAC402-SSHM-T Atmel, AT24MAC402-SSHM-T Datasheet - Page 8
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AT24MAC402-SSHM-T
Manufacturer Part Number
AT24MAC402-SSHM-T
Description
EEPROM 2-Kbit Serial EEPROM
Manufacturer
Atmel
Datasheet
1.AT24MAC602-SSHM-T.pdf
(28 pages)
Specifications of AT24MAC402-SSHM-T
Rohs
yes
Memory Size
2 Kbit
Organization
256 B x 8
Data Retention
100 yr
Maximum Clock Frequency
1000 KHz
Maximum Operating Current
6 uA
Operating Supply Voltage
1.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
SOIC-8
4.
Device Operation
Clock and Data Transitions: The SDA pin is normally pulled high with an external component such as a pull-up resistor.
Data on the SDA pin may change only during SCL low time periods (see
SCL high periods will indicate a Start or Stop condition as defined below.
Start Condition: A high-to-low transition of SDA with SCL high is a Start condition which must precede any other
command (see
Stop Condition: A low-to-high transition of SDA with SCL high is a Stop condition. After a read sequence, the stop
command will place the EEPROM in a standby power mode (see
Acknowledge: All addresses and data words are serially transmitted to and from the EEPROM in 8-bit words. The
EEPROM sends a zero to acknowledge that it has received each word. This happens during the ninth clock cycle.
Standby Mode: The AT24MAC402/602 features a low-power standby mode which is enabled upon
2-Wire Software Reset: After an interruption in protocol, power loss or system reset, any 2-wire part can be reset by
following these steps:
Figure 4-1. Software Reset
Figure 4-2. Bus Timing
SCL Serial Clock, SDA: Serial Data I/O
SDA OUT
1.
2.
3.
SDA
SCL
SDA IN
SCL
Power-up or
After the receipt of the Stop bit and the completion of any internal operations.
Create a start bit condition.
Clock nine cycles.
Create another start bit followed by Stop bit condition as shown below.
Start
Figure 4-5 on page
Bit
1
9).
2
Dummy Clock Cycles
Atmel AT24MAC402/602 [PRELIMINARY DATASHEET]
3
Figure 4-5 on page
8
Figure 4-4 on page
9
9).
9). Data changes during
Start
Bit
8807B–SEEPR–9/2012
Stop
Bit
8