M95512-DRMN6TP STMicroelectronics, M95512-DRMN6TP Datasheet - Page 28
![no-image](/images/manufacturer_photos/0/6/637/stmicroelectronics_sml.jpg)
M95512-DRMN6TP
Manufacturer Part Number
M95512-DRMN6TP
Description
EEPROM 512Kbit SPIEEPROM 20 MHz 1.8V to 5.5V
Manufacturer
STMicroelectronics
Datasheet
1.M95512-DFDW6TP.pdf
(51 pages)
Specifications of M95512-DRMN6TP
Product Category
EEPROM
Rohs
yes
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Instructions
6.9
Figure 17. Read Lock Status sequence
28/51
S
C
D
Q
Read Lock Status (available only in M95512-D devices)
The Read Lock Status instruction (see
Page is locked or not in Read-only mode. The Read Lock Status sequence is defined with
the Chip Select (S) first driven low. The bits of the instruction byte and address bytes are
then shifted in on Serial Data Input (D). Address bit A10 must be 1, all other address bits are
Don't Care. The Lock bit is the LSB (least significant bit) of the byte read on Serial Data
Output (Q). It is at “1” when the lock is active and at “0” when the lock is not active. If Chip
Select (S) continues to be driven low, the same data byte is shifted out. The read cycle is
terminated by driving Chip Select (S) high.
The instruction sequence is shown in
0
1
High impedance
2
Instruction
3
4
5
6
7
MSB
15
8
Doc ID 11124 Rev 20
14 13
9 10
16-bit address
Figure
Table
3
20 21 22 23 24 25 26 27
2
M95512-W M95512-R M95512-DR M95512-DF
17.
4) is used to check whether the Identification
1
0
MSB
7
6
5
Data Out 1
4
3
28 29 30
2
1
0
31
Data Out 2
7
Ai15966
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