M24C64-DFMC6TG STMicroelectronics, M24C64-DFMC6TG Datasheet - Page 17

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M24C64-DFMC6TG

Manufacturer Part Number
M24C64-DFMC6TG
Description
EEPROM 64 Kbit Serial I2C 1.7V to 5.5V EEPROM
Manufacturer
STMicroelectronics
Datasheet

Specifications of M24C64-DFMC6TG

Product Category
EEPROM
Rohs
yes
M24C64-W M24C64-R M24C64-F M24C64-DF
5.1.3
5.1.4
Write Identification Page (M24C64-D only)
The Identification Page (32 bytes) is an additional page which can be written and (later)
permanently locked in Read-only mode. It is written by issuing the Write Identification Page
instruction. This instruction uses the same protocol and format as Page Write (into memory
array), except for the following differences:
If the Identification page is locked, the data bytes transferred during the Write Identification
Page instruction are not acknowledged (NoAck).
Lock Identification Page (M24C64-D only)
The Lock Identification Page instruction (Lock ID) permanently locks the Identification page
in Read-only mode. The Lock ID instruction is similar to Byte Write (into memory array) with
the following specific conditions:
Device type identifier = 1011b
MSB address bits A15/A5 are don't care except for address bit A10 which must be ‘0’.
LSB address bits A4/A0 define the byte address inside the Identification page.
Device type identifier = 1011b
Address bit A10 must be ‘1’; all other address bits are don't care
The data byte must be equal to the binary value xxxx xx1x, where x is don't care
Doc ID 16891 Rev 27
Instructions
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