1894K-32LFT IDT, 1894K-32LFT Datasheet - Page 38
![no-image](/images/no-image-200.jpg)
1894K-32LFT
Manufacturer Part Number
1894K-32LFT
Description
Ethernet ICs 3.3V 10/100 PHY RMII
Manufacturer
IDT
Datasheet
1.1894KI-32LF.pdf
(50 pages)
Specifications of 1894K-32LFT
Rohs
yes
Part # Aliases
ICS1894K-32LFT
- Current page: 38 of 50
- Download datasheet (309Kb)
10M Media Independent Interface: Receive Latency
10M MII Receive Latency Timing Diagram
IDT® 10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
ICS1894-32
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
TP_RX
RXCLK
RXD
The table below lists the significant time periods for the 10M MII timing. The time periods consist of timings of
signals on the following pins:
•
•
•
The 10M MII Receive Latency Timing Diagram shows the timing diagram for the time periods.
Period
†
Time
TP_RX (that is, the MII TP_RXP and TP_RXN pins)
RXCLK
RXD
Manchester encoding is not shown.
t1
†
First Bit of /5/ on TP_RX to /5/D/ on RXD
5
Parameter
5
t1
Conditions Min. Typ. Max.
10M MII
38
–
5
6.5
ICS1894-32
7
Bit times
Units
PHYCEIVER
REV M 021512
D
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