MAX98090AETL+ Maxim Integrated, MAX98090AETL+ Datasheet - Page 143
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MAX98090AETL+
Manufacturer Part Number
MAX98090AETL+
Description
Interface - CODECs 5V 130mW Stereo Headphone Amp
Manufacturer
Maxim Integrated
Datasheet
1.MAX98090BETL.pdf
(166 pages)
Specifications of MAX98090AETL+
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MAX98090
Jack Detection
The device features a flexible, software configurable
jack detection interface. Once enabled, the jack detec-
tion interface uses two internal comparators to sense the
insertion/removal of a jack and identify the type of jack
inserted (headphones or headset). When the device is in
shutdown or the microphone bias is disabled, the com-
parator thresholds are referenced to V
the device is active and microphone bias is enabled, the
comparator thresholds are referenced to V
Figure 43. Block Diagram and Typical Application Circuit for Jack Detection
www.maximintegrated.com
2.2kΩ
MIC
GND
RIGHT
1µF
1µF
SPKLVDD
MICBIAS
LEFT
. When
.
HPL
HPR
HPSNS
MICBIAS
V
ANALOG
MIC INPUT
V
JACKSNS
IN+
IN-
Jack detection operation relies on a pullup resistance
to set the bias when no jack is inserted. When the
device is in shutdown mode or the microphone bias is
disabled (MICBIAS is high impedance), an internal pul-
lup is enabled on JACKSNS, and is referenced to the
SPKLVDD supply. When the device is not in shutdown
and the microphone bias is enabled, the internal pullup
is disabled (JACKSNS is high impedance). In this state,
successful jack detection requires an external pullup
on JACKSNS to MICBIAS. The jack detection internal
interface structure and typical external application circuit
is shown in Figure 43.
V
V
Ultra-Low Power Stereo Audio Codec
V
V
SPKLVDD
SPKLVDD
MICBIAS
MICBIAS
MBEN
95%
10%
V
V
TH
TH
INTERNAL
CONTROL
V
PULL-UP
SPKLVDD
COMPARATOR
COMPARATOR
LOAD SENSE
JACK SENSE
JDEB[1:0]
JDETEN
JDETEN
JDWK
JKSNS
LSNS
Maxim Integrated │ 143
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