MAX3882AETX+ Maxim Integrated, MAX3882AETX+ Datasheet - Page 10

• Manufacturer Part Number: MAX3882AETX+
• Description: Serializers & Deserializers - Serdes
• Manufacturer: Maxim Integrated

Specifications of MAX3882AETX+

• Operating Supply Voltage: 3 V to 3.6 V
• Package / Case: TQFN-36 EP
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 3 V

2.488Gbps 1:4 Demultiplexer with Clock and
Data Recovery and Limiting Amplifier
Clock holdover is required in some applications where
a valid clock needs to be provided to the upstream
device in the absence of data transitions. To provide
this function, an external reference clock rate of
155MHz or 622MHz must be applied to the SLBI input.
Control input FREFSET selects which reference clock
rate to use. The control LREF selects whether the PLL
locks to the input data stream (SDI) or the reference
clock (SLBI). When LREF is low, the input is switched
to the reference clock input. This LREF input can be
driven by connecting the LOL output pin directly or
connecting to any other power monitor signal from the
system.
The MAX3882A is designed to allow system loopback
testing. The user can connect the serializer output
(MAX3892) directly to the SLBI± inputs of the
MAX3882A for system diagnostics. See Table 1 for
selecting the system loopback operation mode. During
system loopback, LOL cannot be connected to LREF.
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Applications Information
Clock Holdover Capability
System Loopback
To correctly interface with the MAX3882A’s CML input
and LVDS outputs, refer to Application Note 291:
HFAN-1.0: Introduction to LVDS, PECL, and CML .
For best performance, use good high-frequency layout
techniques. Filter voltage supplies, keep ground con-
nections short, and use multiple vias where possible.
Use controlled-impedance transmission lines to inter-
face with the MAX3882A high-speed inputs and out-
puts. Power-supply decoupling should be placed as
close to the V
isolate input signals from output signals.
The exposed pad, 36-pin TQFN incorporates features
that provide a very low thermal-resistance path for heat
removal from the IC. The pad is electrical ground on
the MAX3882A and should be soldered to the circuit
board for proper thermal and electrical performance.
CC
as possible. To reduce feedthrough,
Interfacing the MAX3882A
Exposed-Paddle Package
Layout Techniques