MAX3882AETX+ Maxim Integrated, MAX3882AETX+ Datasheet - Page 6

• Manufacturer Part Number: MAX3882AETX+
• Description: Serializers & Deserializers - Serdes
• Manufacturer: Maxim Integrated

Specifications of MAX3882AETX+

• Operating Supply Voltage: 3 V to 3.6 V
• Package / Case: TQFN-36 EP
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 3 V

2.488Gbps 1:4 Demultiplexer with Clock and
Data Recovery and Limiting Amplifier
6
1, 11, 16, 23, 29
2, 5, 31, 32
_______________________________________________________________________________________
12, 14
15, 28
PIN
10
13
17
18
19
20
21
22
24
25
26
27
30
33
34
35
36
—
3
4
6
7
8
9
V
V
FREFSET
PCLK+
CC
CC
NAME
SLBI+
PCLK-
CAZ+
SLBI-
PD0+
PD1+
PD2+
PD3+
V
CAZ-
GND
SDI+
PD0-
PD1-
PD2-
PD3-
V
SDI-
V
SIS
FIL
CTRL
EP
REF
_VCO
_OUT
CC
Supply Ground
+3.3V Supply Voltage
Positive Data Input. 2.488Gbps serial data stream, CML.
Negative Data Input. 2.488Gbps serial data stream, CML.
Positive System Loopback Input or Positive Reference Clock Input, CML
Negative System Loopback Input or Negative Reference Clock Input, CML
Signal Input Selection, LVTTL. Low for normal data, high for system loopback.
Loss-of-Lock Output, LVTTL, Active Low
TTL Control Input for PLL Clock Holdover. Low for PLL lock to reference clock, high for PLL
lock to input data.
Supply Voltage for the VCO
PLL Loop-Filter Capacitor Input. Connect a 0.068μF loop-filter capacitor between FIL and
V
Supply Voltage for LVDS Output Buffers
Negative Clock Output, LVDS
Positive Clock Output, LVDS
Negative Data Output, LVDS
Positive Data Output, LVDS
Negative Data Output, LVDS
Positive Data Output, LVDS
Negative Data Output, LVDS
Positive Data Output, LVDS
Negative Data Output, LVDS, MSB
Positive Data Output, LVDS, MSB
Sets Reference Frequency. LVTTL low for 622MHz/667MHz reference, high for
155MHz/167MHz reference.
Positive Capacitor Input for DC Offset-Cancellation Loop. Connect a 0.1μF capacitor
between CAZ+ and CAZ-.
Negative Capacitor Input for DC Offset-Cancellation Loop. Connect a 0.1μF capacitor
between CAZ+ and CAZ-.
2.2V Bandgap Reference Voltage Output. Optionally used for threshold adjustment.
Analog Control Input for Threshold Adjustment. Connect to V
Exposed Pad. The exposed pad must be soldered to the circuit board ground for proper
thermal and electrical performance.
CC_
VCO.
FUNCTION
CC
to disable threshold adjust.
Pin Description