MAX3140EEI-T Maxim Integrated, MAX3140EEI-T Datasheet - Page 15
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MAX3140EEI-T
Manufacturer Part Number
MAX3140EEI-T
Description
UART Interface IC
Manufacturer
Maxim Integrated
Type
SPI/MICROWIRE-Compatible UART with Integrated ESD-Protected RS-485/RS-422 Transceiverr
Datasheet
1.MAX3140EEI-T.pdf
(36 pages)
Specifications of MAX3140EEI-T
Data Rate
115 Kbps, 500 Kbps, 10Mbps
Supply Voltage - Max
5.25 V
Supply Voltage - Min
4.75 V
Supply Current
0.7 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Description/function
SPI/MICROWIRE-Compatible UART with integrated RS-485/RS-422 transceivers
Mounting Style
SMD/SMT
Operating Supply Voltage
5 V
The universal asynchronous receiver transmitter
(UART) interfaces the SPI/MICROWIRE-compatible syn-
chronous serial data from a microprocessor (µP) to
asynchronous, serial-data communication ports (RS-
485, IrDA). Figure 10 shows the MAX3140 functional
diagram. Included in the UART function is an
SPI/MICROWIRE interface, a baud-rate generator, and
an interrupt generator.
Figure 10. Functional Diagram
Figure 11. Compatible CPOL and CPHA Modes
SPI/MICROWIRE-Compatible UART with Integrated
DOUT
SCLK
IRQ
DIN
CS
SCLK
SCLK
SCLK
SCLK
DOUT
DIN
CS
NOTE: SWITCH POSITIONS INDICATE H/F = GND
(CPOL = 0, CPHA = 0)
(CPOL = 0, CPHA = 1)
(CPOL = 1, CPHA = 0)
(CPOL = 1, CPHA = 1)
INTERFACE
INTERRUPT
LOGIC
______________________________________________________________________________________
SPI
True Fail-Safe RS-485/RS-422 Transceivers
MSB
MSB
14
14
9
9
13
13
4
TX SHIFT REGISTSER
RX SHIFT REGISTSER
RX FIFO
12
12
RX BUFFER
TX BUFFER
GENERATOR
BAUD-RATE
9
9
11
11
9
9
P
r
10
10
I/O
P
P
P
P
9
r
r
t
t
9
9
UART
RTS
RX
X2
X1
TX
CTS
8
8
7
7
GND
RXP
TXP
SRL
H/F
DE
RE
RO
DI
6
6
The MAX3140 is compatible with SPI, QSPI (CPOL = 0,
CPHA = 0), and MICROWIRE serial-interface standards
(Figure 11). The MAX3140 has a unique full-duplex
architecture that expects a 16-bit word for DIN and
simultaneously produces a 16-bit word for DOUT
regardless of which read/write register used. The DIN
stream is monitored for its first two bits to tell the UART
the type of data transfer being executed (see the
WRITE CONFIGURATION register, READ CONFIG-
URATION register, WRITE DATA register, and READ
DATA register sections). DIN (MOSI) is latched on
5
5
4
4
3
3
MAX3140
2
2
1
1
LSB
LSB
COMPATIBLE
WITH MAX3140
NOT COMPATIBLE
WITH MAX3140
SPI Interface
A
B
Y
Z
15