AN30181A-VL Panasonic Electronic Components, AN30181A-VL Datasheet - Page 13

• Manufacturer Part Number: AN30181A-VL
• Description: Low Dropout Controllers - LDO Vout 1.2-1.8 800mA 2Ch Buck DC-DC
• Manufacturer: Panasonic Electronic Components

Specifications of AN30181A-VL

• Rohs: yes
• Input Voltage Max: 5.5 V
• Output Voltage: 1.2 v to 1.8 V
• Output Current: 0.8 A
• Load Regulation: 10 mV
• Number Of Outputs: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: HQFN-24
• Input Voltage Min: 2.9 V
• Maximum Power Dissipation: 1.472 W
• Minimum Operating Temperature: - 40 C
• Supply Current: 0.8 A

OPERATION (Continued)
3. Protection
• UVLO function
• Reset function
• DC-DC1 (Output voltage : 1.2 V)
• External Pch-MOSFET gate control function
• External synchronization signal output function
• DC-DC2 (Output voltage : 1.8 V)
• BUF (Output voltage : 0.9 V)
Note) The characteristics listed below are reference values derived from the design of the IC and are not guaranteed.
When power supply rises to 2.6 V or higher at EN = High, UVLO is released, and the operation of each function
starts.Since this function‘s hysteresis is 100 mV, UVLO detects when power supply falls to 2.5 V or lower,
then each function shuts down.
RESET pin shifts to High at 30 ms delay after power supply rises to 2.92 V or higher.
(Output type : Nch MOS open drain)
Since this function's hysteresis is 110 mV, RESET pin shifts to Low when power supply falls to 2.81 V or lower.
(No delay in case of High → Low)
When UVLO is released, DC-DC1 starts and outputs 1.2 V. Soft-start function operates for 1 ms after startup.
Since output voltage rises slowly, limiting input current, it is possible to prevent rush current and overshoot.
When UVLO detects, DCpDC1 turns off. When EN pin shifts to Low, an output pin (FB1) is terminated
with a resistor.
PCNT pin is discharged by the constant current (2.5 μA) at 3.75 ms delay after UVLO is released.
By connecting the gate of Pch MOSFET to PCNT pin, it is possible to turn on this FET softly.
At the same time, the termination with a resistor of DIS pin is released.
Just after UVLO detects, PCNT pin voltage becomes V
PCNTB pin outputs the signal which synchronized with the above-mentioned PCNT pin. Therefore, PCNTB pin
outputs High at 3.75 ms delay after UVLO is released. PCNTB pin outputs Low just after UVLO detects.
DC-DC2 starts and outputs 1.8 V at 7.5 ms delay after UVLO is released. DC-DC2 has the same soft-start
function as DC-DC1 and starts, preventing rush current and overshoot.
DC-DC2 stops because UVLO detects. When EN pin shifts to Low, an output pin (FB2) is terminated
with a resistor.
BUF pin outputs 0.9 V at 8.5 ms delay after UVLO is released. BUF starts, preventing rush current
and overshoot.
BUF stops because UVLO detects. BUF is terminated with a resistor when EN pin shifts to Low.
13
IN
and DIS pin is terminated with a resistor.
AN30181A
Ver. BEB