DS21Q554BN Maxim Integrated, DS21Q554BN Datasheet - Page 11
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DS21Q554BN
Manufacturer Part Number
DS21Q554BN
Description
Network Controller & Processor ICs
Manufacturer
Maxim Integrated
Datasheet
1.DS21Q554BN.pdf
(13 pages)
Specifications of DS21Q554BN
Part # Aliases
90-21Q55-4BN
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DS21Q554BN+
Manufacturer:
Maxim Integrated
Quantity:
10 000
DALLAS SEMICONDUCTOR
DS21Q352 / DS21Q552 / DS21Q354 / DS21Q554 PCB Land Pattern Figure 2
The diagram shown below is the lead pattern that will be placed on the target PCB. This is the same
pattern that would be seen as viewed through the MCM from the top.
December 29, 1998
W
G
M
A
B
C
D
E
F
H
K
N
P
R
T
U
V
Y
J
L
rsync
rsync
tsync
rneg
rpos
rsigf
sync
rvdd
tneg
mclk
rsig
rlos
rlclk
rsys
rch
8m
int*
tch
ttip
1
clk
clk
rm
clk
jtdi
blk
3
o
3
3
3
3
1
1
1
1
1
1
1
1
1
1
1
1
1
i
i
rposi
dvdd
sync
rneg
rsigf
sync
rlink
rvss
rvss
tvdd
tring
rser
rlos
rser
rsig
liuc
rch
bts
2
rm
blk
rd*
A2
rf
3
3
o
3
3
3
3
1
1
1
1
1
1
1
1
1
1
dvdd
dvdd
dvss
dvss
rneg
rneg
tneg
tpos
rlink
rlclk
rsys
tlclk
rclk
rch
wr*
rclk
rclk
ttip
3
clk
clk
A0
cs
1*
3
3
3
3
3
3
3
1
1
o
1
o
1
1
1
o
1
1
1
2
i
i
dvdd
dvss
sync
dvdd
rvss
rvdd
rpos
ALE
rpos
AD7
AD6
tvss
tring
rclk
rclk
rclk
A7/
D7/
D6/
8m
clk
rch
blk
4
A5
A3
3
o
3
3
3
3
3
3
1
rf
1
o
1
1
1
1
1
2
i
i
i
dvss
dvdd
tvss
rvss
AD5
tlink
D5/
ttip
5
cs
3*
3
3
3
1
1
3
dvdd
dvss
tlink
tlclk
tring
tclk
6
co
ci
3
3
3
3
1
1
1
3
i
DS21Q352/DS21Q552/DS21Q354/DS21Q554 Preliminary Data Sheet
tsync
tclko
dvss
AD3
tpos
D3/
tclk
ttip
7
3
3
3
ci
3
o
1
o
1
4
tpos
tneg
dvss
tring
tch
tclk
8
clk
A6
A4
3
3
3
3
1
4
i
i
i
dvdd
dvss
tpos
tneg
AD4
tser
D4/
tclk
9
co
3
3
o
3
o
3
1
1
1
10
sync
tsig
tser
mux
tsig
tclk
tch
rtip
clk
ts
3
3
3
3
1
1
1
11
dvss
tvdd
rring
tsys
AD0
tsys
D0/
rlos
clk
tch
blk
clk
3
2
3
3
4
1
1
12
rsync
rsync
dvdd
dvdd
sync
rlclk
rlink
rch
blk
ts
3
2
2
2
4
4
1
4
13
dvss
rneg
dvss
rlink
jtms
rclk
8m
clk
rtip
2
2
2
2
4
4
2
i
14
sync
rring
rpos
rsys
rclk
rch
clk
rch
clk
clk
cs
2*
2
o
2
2
4
rf
4
4
2
i
15
rneg
rsigf
rpos
rpos
rclki
rser
AD2
jtclk
D2/
2
o
2
2
2
o
4
4
i
16
dvdd
sync
sync
rpos
rsigf
rsig
test
rtip
rm
rm
o
2
2
2
2
4
4
3
17
dvdd
jtdo3
dvss
sync
rvdd
dvss
rneg
rneg
rring
tser
rlos
rsys
rclk
rclk
rser
rch
8m
clk
blk
clk
A1
co
cs
4*
2
2
2
rf
2
2
2
2
2
2
4
4
4
4
o
4
o
4
4
3
i
i
18
tsync
sync
dvdd
dvdd
jtrst*
rvdd
tvss
rvss
rlclk
tsys
tlclk
tvss
tsig
tclk
jtdo
rclk
rsig
tch
clk
tch
clk
clk
ts
ci
2
2
2
2
o
2
2
2
2
2
4
4
4
4
4
4
4
4
4
4
19
jtdo4
tpos
tneg
tvdd
sync
tpos
tpos
tvdd
tsys
tlink
rvss
AD1
tlink
rvss
tclk
tclk
D1/
tsig
tclk
tclk
rtip
clk
ts
2
2
o
2
2
2
2
2
2
4
4
4
o
4
o
4
4
4
4
4
4
i
i
i
20
tsync
dvss
dvdd
dvss
dvss
dvdd
mclk
rring
tneg
tpos
tlclk
tser
tneg
tneg
rvss
11
tclk
tch
blk
tch
blk
co
ci
2
o
2
2
2
2
2
4
4
4
4
4
4
o
4
4
4
4
4
4
2
4
i
i
i