DS21Q554BN Maxim Integrated, DS21Q554BN Datasheet - Page 7
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DS21Q554BN
Manufacturer Part Number
DS21Q554BN
Description
Network Controller & Processor ICs
Manufacturer
Maxim Integrated
Datasheet
1.DS21Q554BN.pdf
(13 pages)
Specifications of DS21Q554BN
Part # Aliases
90-21Q55-4BN
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DS21Q554BN+
Manufacturer:
Maxim Integrated
Quantity:
10 000
DALLAS SEMICONDUCTOR
A17
A20
B11
C13
A5
B7
B9
C3
H20
L20
N17
U13
U1
Y15
N1
H18
V17
V19
W13
V18
K2
T1
W20
U10
M2
G17
G4
Y12
J1
D14
F3
U14
N3
B13
E3
M18
M4
A15
A4
R17
M3
C14
B4
T17
N2
K4
D17
A2
V14
F1
A12
D3
K18
G2
A13
A3
U12
December 29, 1998
DVSS2
DVSS2
DVSS2
DVSS2
DVSS3
DVSS3
DVSS3
DVSS3
DVSS4
DVSS4
DVSS4
DVSS4
INT*
JTCLK
JTDI
JTDO2
JTDO3
JTDO4
JTMS
JTRST*
LIUC
MCLK1
MCLK2
MUX
RCHBLK1
RCHBLK2
RCHBLK3
RCHBLK4
RCHCLK1
RCHCLK2
RCHCLK3
RCHCLK4
RCLK1
RCLK2
RCLK3
RCLK4
RCLKI1
RCLKI2
RCLKI3
RCLKI4
RCLKO1
RCLKO2
RCLKO3
RCLKO4
RD*(DS*)
RFSYNC1
RFSYNC2
RFSYNC3
RFSYNC4
RLCLK1
RLCLK2
RLCLK3
RLCLK4
RLINK1
RLINK2
RLINK3
RLINK4
–
–
–
–
–
–
–
–
–
–
–
–
O
I
I
O
O
O
I
I
I
I
I
I
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
O
O
O
O
I
O
O
O
O
O
O
O
O
O
O
O
O
DS21Q352/DS21Q552/DS21Q354/DS21Q554 Preliminary Data Sheet
Digital Signal Ground.
Digital Signal Ground.
Digital Signal Ground.
Digital Signal Ground.
Digital Signal Ground.
Digital Signal Ground.
Digital Signal Ground.
Digital Signal Ground.
Digital Signal Ground
Digital Signal Ground
Digital Signal Ground
Digital Signal Ground
Interrupt for all four SCTs.
JTAG Clock.
JTAG Data Input.
JTAG Data Output from SCT2.
JTAG Data Output from SCT3.
JTAG Data Output from SCT4.
JTAG Test Mode Select.
JTAG Reset.
Line Interface Connect for all Four SCTs.
Master Clock for SCT1 and SCT3.
Master Clock for SCT2 and SCT4.
Mux Bus Select.
Receive Channel Block for SCT1.
Receive Channel Block for SCT2.
Receive Channel Block for SCT3.
Receive Channel Block for SCT4.
Receive Channel Clock for SCT1.
Receive Channel Clock for SCT2.
Receive Channel Clock for SCT3.
Receive Channel Clock for SCT4.
Receive Clock Output from the Framer on SCT1.
Receive Clock Output from the Framer on SCT2.
Receive Clock Output from the Framer on SCT3.
Receive Clock Output from the Framer on SCT4.
Receive Clock Input for the LIU on SCT1.
Receive Clock Input for the LIU on SCT2.
Receive Clock Input for the LIU on SCT3.
Receive Clock Input for the LIU on SCT4.
Receive Clock Output from the LIU on SCT1.
Receive Clock Output from the LIU on SCT2.
Receive Clock Output from the LIU on SCT3.
Receive Clock Output from the LIU on SCT4.
Read Input (Data Strobe)
Receive Frame Sync (before the receive elastic store) for SCT1.
Receive Frame Sync (before the receive elastic store) for SCT2.
Receive Frame Sync (before the receive elastic store) for SCT3.
Receive Frame Sync (before the receive elastic store) for SCT4.
Receive Link Clock for SCT1.
Receive Link Clock for SCT2.
Receive Link Clock for SCT3.
Receive Link Clock for SCT4.
Receive Link Data for SCT1.
Receive Link Data for SCT2.
Receive Link Data for SCT3.
Receive Link Data for SCT4.
7