DS26528GNA4 Maxim Integrated, DS26528GNA4 Datasheet - Page 136
DS26528GNA4
Manufacturer Part Number
DS26528GNA4
Description
Network Controller & Processor ICs
Manufacturer
Maxim Integrated
Datasheet
1.DS26528GNA4.pdf
(276 pages)
Specifications of DS26528GNA4
Part # Aliases
90-26528-NA4
- Current page: 136 of 276
- Download datasheet (2Mb)
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 5: BOC Bit 5 (RBOC5).
Bit 4: BOC Bit 4 (RBOC4).
Bit 3: BOC Bit 3 (RBOC3).
Bit 2: BOC Bit 2 (RBOC2).
Bit 1: BOC Bit 1 (RBOC1).
Bit 0: BOC Bit 0 (RBOC0).
The T1RBOC register always contains the last valid BOC received. The Receive FDL register (T1RFDL) reports
the incoming Facility Data Link (FDL) or the incoming Fs bits. The LSB is received first. In D4 framing mode, RFDL
updates on multiframe boundaries and reports the six Fs bits in RFDL[5:0].
—
7
0
T1RBOC (T1 Mode)
Receive BOC Register
063h + (200h x n): where n = 0 to 7, for Ports 1 to 8
—
6
0
RBOC5
5
0
136 of 276
RBOC4
4
0
RBOC3
3
0
DS26528 Octal T1/E1/J1 Transceiver
RBOC2
2
0
RBOC1
1
0
RBOC0
0
0
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