74ABT374CSJ_Q Fairchild Semiconductor, 74ABT374CSJ_Q Datasheet - Page 7

• Manufacturer Part Number: 74ABT374CSJ_Q
• Description: Flip Flops Oct D-Type Flip-Flop
• Manufacturer: Fairchild Semiconductor

Specifications of 74ABT374CSJ_Q

• Number Of Circuits: 8
• Logic Family: 74ABT
• Logic Type: D-Type Flip-Flop
• Polarity: Non-Inverting
• Input Type: Single-Ended
• Output Type: Single-Ended
• Propagation Delay Time: 5 ns
• High Level Output Current: - 32 mA
• Low Level Output Current: 64 mA
• Supply Voltage - Max: 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SOP-20
• Minimum Operating Temperature: - 40 C
• Number Of Input Lines: 8
• Number Of Output Lines: 3
• Supply Voltage - Min: 4.5 V

©1992 Fairchild Semiconductor Corporation
74ABT374 Rev. 1.5.0
Skew
SOIC package.
Notes:
11. This specification is guaranteed but not tested. The limits represent propagation delays with 250pF load capacitors
12. This describes the difference between the delay of the LOW-to-HIGH and the HIGH-to-LOW transition on the same
13. Skew is defined as the absolute value of the difference between the actual propagation delays for any two separate
14. Propagation delay variation for a given set of conditions (i.e., temperature and V
15. This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described
Capacitance
Note:
16. C
t
t
t
t
t
OSHL
OSLH
PS
OST
PV
Symbol
in place of the 50pF load capacitors in the standard AC load.
pin. It is measured across all the outputs (drivers) on the same chip, the worst (largest delta) number is the
guaranteed specification. This specification is guaranteed but not tested.
outputs of the same device. The specification applies to any outputs switching HIGH-to-LOW (t
(t
but not tested.
specification is guaranteed but not tested.
switching in phase (i.e., all LOW-to-HIGH, HIGH-to-LOW, etc.).
Symbol
C
(12)
(14)
OSLH
OUT
(13)
OUT
C
(13)
(13)
(15)
IN
(16)
), or any combination switching LOW-to-HIGH and/or HIGH-to-LOW (t
is measured at frequency f
Pin to Pin Skew,
HL Transitions
Pin to Pin Skew,
LH Transitions
Duty Cycle, LH–HL Skew
Pin to Pin Skew,
LH/HL Transitions
Device to Device Skew,
LH/HL Transitions
Input Capacitance
Output Capacitance
Parameter
Parameter
1MHz, per MIL-STD-883, Method 3012.
8 Outputs Switching
T
A
V
CC
–40°C to +85°C
C
V
V
CC
CC
L
Max.
4.5V–5.5V
1.0
1.0
1.8
2.0
2.5
7
50 pF
0V
5.0V
Conditions
T
A
(11)
25°C
8 Outputs Switching
OST
T
A
V
). This specification is guaranteed
CC
CC
C
–40°C to +85°C
) from device to device. This
L
Max.
4.5V–5.5V
1.8
1.8
4.3
4.3
4.6
250 pF
Typ.
5.0
9.0
OSHL
), LOW-to-HIGH
(12)
www.fairchildsemi.com
Units
pF
pF
Units
ns
ns
ns
ns
ns