93LC56B-I/P Microchip Technology, 93LC56B-I/P Datasheet - Page 8

• Manufacturer Part Number: 93LC56B-I/P
• Description: IC EEPROM 2KBIT 3MHZ 8DIP
• Manufacturer: Microchip Technology

Specifications of 93LC56B-I/P

• Memory Size: 2K (128 x 16)
• Package / Case: 8-DIP (0.300", 7.62mm)
• Operating Temperature: -40°C ~ 85°C
• Format - Memory: EEPROMs - Serial
• Memory Type: EEPROM
• Speed: 2MHz, 3MHz
• Interface: Microwire, 3-Wire Serial
• Voltage - Supply: 2.5 V ~ 5.5 V
• Organization: 128 K x 16
• Interface Type: Microwire
• Maximum Clock Frequency: 2 MHz
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.5 V
• Maximum Operating Current: 0.5 mA
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 2.5 V, 5.5 V
• Package: 8PDIP
• Density: 2 Kb
• Maximum Operating Frequency: 2 MHz
• Typical Operating Supply Voltage: 3.3|5 V
• Data Retention: 200(Min) Year
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 93LC56B-I/PG

93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
2.5
The Erase All (ERAL) instruction will erase the entire
memory array to the logical ‘1’ state. The ERAL cycle
is identical to the erase cycle, except for the different
opcode. The ERAL cycle is completely self-timed and
commences at the falling edge of the CS, except on
‘93C’ devices where the rising edge of CLK before the
last data bit initiates the write cycle. Clocking of the
CLK pin is not necessary after the device has entered
the ERAL cycle.
FIGURE 2-3:
FIGURE 2-4:
DS21794F-page 8
CLK
CLK
DO
DO
CS
DI
V
CS
DI
CC
must be ≥4.5V for proper operation of ERAL.
Erase All (ERAL)
High-Z
High-Z
1
1
ERAL TIMING FOR 93AA AND 93LC DEVICES
ERAL TIMING FOR 93C DEVICES
0
0
0
0
1
1
0
0
x
x
•••
•••
The DO pin indicates the Ready/
device, if CS is brought high after a minimum of 250 ns
low (T
V
x
x
CC
Note:
T
T
must be ≥4.5V for proper operation of ERAL.
CSL
CSL
CSL
).
After the ERAL command is complete,
issuing a Start bit and then taking CS low
will clear the Ready/
T
EC
T
T
T
SV
EC
SV
Check Status
Check Status
Busy
Busy
© 2008 Microchip Technology Inc.
Ready
Ready
Busy
Busy
status from DO.
High-Z
High-Z
status of the
T
T
CZ
CZ