XRT83SL28ES Exar, XRT83SL28ES Datasheet - Page 6

• Manufacturer Part Number: XRT83SL28ES
• Description: Peripheral Drivers & Components - PCIs 8 CH E1 LIU SH
• Manufacturer: Exar

Specifications of XRT83SL28ES

• Product Category: Peripheral Drivers & Components - PCIs
• Rohs: yes

XRT83SL28
8-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT
4.0 SERIAL MICROPROCESSOR INTERFACE BLOCK ..........................................................................31
ELECTRICAL CHARACTERISTICS ................................................................................41
ORDERING INFORMATION.............................................................................................44
PACKAGE DIMENSIONS.................................................................................................44
R
3.2 LINE CARD REDUNDANCY ........................................................................................................................... 26
3.3 POWER FAILURE PROTECTION .................................................................................................................. 30
3.4 OVERVOLTAGE AND OVERCURRENT PROTECTION ............................................................................... 30
3.5 NON-INTRUSIVE MONITORING .................................................................................................................... 30
4.1 SERIAL TIMING INFORMATION .................................................................................................................... 31
4.2 16-BIT SERIAL DATA INPUT DESCRIPTION ............................................................................................... 32
4.3 8-BIT SERIAL DATA OUTPUT DESCRIPTION ............................................................................................. 32
EVISION
F
F
F
F
F
F
F
F
F
F
T
T
T
T
T
T
T
T
T
T
T
T
T
T
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
3.1.1 LOCAL ANALOG LOOPBACK .................................................................................................................................. 24
3.1.2 REMOTE LOOPBACK ................................................................................................................................................ 24
3.1.3 DIGITAL LOOPBACK ................................................................................................................................................. 25
3.2.1 1:1 AND 1+1 REDUNDANCY WITHOUT RELAYS .................................................................................................... 26
3.2.2 TRANSMIT INTERFACE WITH 1:1 AND 1+1 REDUNDANCY .................................................................................. 26
3.2.3 RECEIVE INTERFACE WITH 1:1 AND 1+1 REDUNDANCY..................................................................................... 27
3.2.4 N+1 REDUNDANCY USING EXTERNAL RELAYS ................................................................................................... 27
3.2.5 TRANSMIT INTERFACE WITH N+1 REDUNDANCY ................................................................................................ 28
3.2.6 RECEIVE INTERFACE WITH N+1 REDUNDANCY ................................................................................................... 29
4.2.1 R/W (SCLK1)............................................................................................................................................................... 32
4.2.2 A[5:0] (SCLK2 - SCLK7)............................................................................................................................................. 32
4.2.3 X (DUMMY BIT SCLK8) .............................................................................................................................................. 32
4.2.4 D[7:0] (SCLK9 - SCLK16)........................................................................................................................................... 32
6: M
7: M
8: M
9: M
10: M
11: M
12: M
13: M
14: A
15: DC D
16: AC E
17: P
18: R
19: E1 T
18. S
19. S
20. S
21. S
22. S
23. S
24. S
25. S
26. S
27. T
H
ISTORY
ICROPROCESSOR
ICROPROCESSOR
ICROPROCESSOR
ICROPROCESSOR
BSOLUTE
OWER
ECEIVER
ICROPROCESSOR
ICROPROCESSOR
ICROPROCESSOR
ICROPROCESSOR
IMING
IMPLIFIED
IMPLIFIED
IMPLIFIED
IMPLIFIED
IMPLIFIED
IMPLIFIED
IMPLIFIED
IMPLIFIED
IMPLIFIED
RANSMITTER
LECTRICAL
IGITAL
.......................................................................................................................................45
C
D
ONSUMPTION
IAGRAM FOR THE
E
M
LECTRICAL
I
B
B
B
B
B
B
B
B
B
AXIMUM
NPUT AND
LOCK
LOCK
LOCK
LOCK
LOCK
LOCK
LOCK
LOCK
LOCK
C
E
R
R
R
R
HARACTERISTICS
R
R
R
R
LECTRICAL
EGISTER
EGISTER
EGISTER
EGISTER
D
D
D
D
D
D
D
D
D
EGISTER
EGISTER
EGISTER
EGISTER
R
IAGRAM OF
IAGRAM OF
IAGRAM OF
IAGRAM OF THE
IAGRAM OF THE
IAGRAM OF THE
IAGRAM OF THE
IAGRAM OF A
IAGRAM OF THE
ATINGS
.................................................................................................................................................. 41
C
O
HARACTERISTICS
UTPUT
S
D
0
0
0
ERIAL
X
X
X
B
B
B
B
....................................................................................................................................... 41
ESCRIPTION
C
00
01
02
IT
IT
IT
IT
E
HARACTERISTICS
L
R
D
LECTRICAL
H
H
H
D
D
D
D
OCAL
EMOTE
IGITAL
N
M
............................................................................................................................... 41
ESCRIPTION
ESCRIPTION
ESCRIPTION
ESCRIPTION
B
B
B
ON
ICROPROCESSOR
T
R
T
R
S
IT
IT
IT
RANSMIT
RANSMIT
ERIAL
ECEIVE
ECEIVE
-I
D
D
D
A
NTRUSIVE
L
ESCRIPTION
ESCRIPTION
ESCRIPTION
NALOG
..................................................................................................................... 42
L
.................................................................................................................... 33
OOPBACK
OOPBACK
C
M
HARACTERISTICS
I
I
ICROPROCESSOR
NTERFACE FOR
NTERFACE FOR
............................................................................................................ 36
............................................................................................................ 38
............................................................................................................ 38
............................................................................................................ 39
I
I
NTERFACE FOR
NTERFACE FOR
L
.......................................................................................................... 43
OOPBACK
M
II
..................................................................................................... 25
.................................................................................................... 24
ONITORING
................................................................................................... 35
................................................................................................... 36
................................................................................................... 36
I
NTERFACE
......................................................................................... 24
1:1
N+1 R
.................................................................................... 41
1:1
N+1 R
A
I
NTERFACE
PPLICATION
................................................................................ 31
AND
AND
EDUNDANCY
EDUNDANCY
1+1 R
1+1 R
................................................................. 31
............................................................... 30
EDUNDANCY
EDUNDANCY
........................................................ 29
...................................................... 28
........................................... 27
......................................... 26
xr
REV. 1.0.0