74AUP2G17GW-G NXP Semiconductors, 74AUP2G17GW-G Datasheet - Page 17
![no-image](/images/manufacturer_photos/0/4/487/nxp_semiconductors_sml.jpg)
74AUP2G17GW-G
Manufacturer Part Number
74AUP2G17GW-G
Description
Buffers & Line Drivers 1.8V DUAL SCHMITT TRIGGER BUFF
Manufacturer
NXP Semiconductors
Datasheet
1.74AUP2G17GN132.pdf
(21 pages)
Specifications of 74AUP2G17GW-G
Product Category
Buffers & Line Drivers
Rohs
yes
Number Of Input Lines
2
Number Of Output Lines
2
Polarity
Non-Inverting
Supply Voltage - Max
3.6 V
Supply Voltage - Min
0.8 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
SOT-363-6
High Level Output Current
- 4 mA
Logic Family
AUP
Logic Type
CMOS
Low Level Output Current
4 mA
Minimum Operating Temperature
- 40 C
Number Of Channels Per Chip
2
Propagation Delay Time
19 ns at 1.1 V to 1.3 V
Factory Pack Quantity
3000
Part # Aliases
74AUP2G17GW,125
NXP Semiconductors
Fig 18. Package outline SOT1202 (XSON6)
74AUP2G17
Product data sheet
XSON6: extremely thin small outline package; no leads;
6 terminals; body 1.0 x 1.0 x 0.35 mm
Dimensions
Note
1. Including plating thickness.
2. Visible depending upon used manufacturing technology.
mm
SOT1202
Unit
Outline
version
max
nom
min
0.35 0.04
A
(1)
A
1
0.20
0.15
0.12
b
IEC
terminal 1
index area
1.05
1.00
0.95
e
D
(6×)
L
(2)
1.05
1.00
0.95
1
E
0.55 0.35
JEDEC
e
1
6
All information provided in this document is subject to legal disclaimers.
e
e
1
1
References
Rev. 6 — 4 December 2012
D
2
5
0.35
0.30
0.27
0
L
e
1
0.40
0.35
0.32
L
1
b
3
4
JEITA
scale
0.5
A
E
L
1
A
1 mm
(4×)
(2)
Low-power dual Schmitt trigger
European
projection
74AUP2G17
© NXP B.V. 2012. All rights reserved.
Issue date
10-04-02
10-04-06
sot1202_po
SOT1202
17 of 21