93LC66A-I/ST Microchip Technology, 93LC66A-I/ST Datasheet - Page 8
![IC EEPROM 4KBIT 2MHZ 8TSSOP](/photos/6/59/65937/c04-086_st_sml.jpg)
93LC66A-I/ST
Manufacturer Part Number
93LC66A-I/ST
Description
IC EEPROM 4KBIT 2MHZ 8TSSOP
Manufacturer
Microchip Technology
Specifications of 93LC66A-I/ST
Memory Size
4K (512 x 8)
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Speed
2MHz
Interface
Microwire, 3-Wire Serial
Voltage - Supply
2.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-TSSOP
Memory Configuration
512 X 8
Ic Interface Type
Microwire
Clock Frequency
3MHz
Supply Voltage Range
2.5V To 5.5V
Memory Case Style
TSSOP
No. Of Pins
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
93LC66A-I/STG
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
93LC66A-I/ST
Manufacturer:
MICROCHIP
Quantity:
8 700
93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C
2.5
The Erase All (ERAL) instruction will erase the entire
memory array to the logical ‘1’ state. The ERAL cycle
is identical to the erase cycle, except for the different
opcode. The ERAL cycle is completely self-timed and
commences at the falling edge of the CS, except on
‘93C’ devices where the rising edge of CLK before the
last data bit initiates the write cycle. Clocking of the
CLK pin is not necessary after the device has entered
the ERAL cycle.
FIGURE 2-3:
FIGURE 2-4:
DS21795D-page 8
CLK
CLK
DO
DO
CS
DI
V
CS
DI
CC
must be ≥4.5V for proper operation of ERAL.
Erase All (ERAL)
High-Z
High-Z
1
1
ERAL TIMING FOR 93AA AND 93LC DEVICES
ERAL TIMING FOR 93C DEVICES
0
0
0
0
1
1
0
0
x
x
•••
•••
The DO pin indicates the Ready/
device, if CS is brought high after a minimum of 250 ns
low (T
V
x
x
CC
Note:
T
T
must be ≥ 4.5V for proper operation of ERAL.
CSL
CSL
CSL
).
Issuing a Start bit and then taking CS low
will clear the Ready/
T
EC
T
T
T
SV
EC
SV
Check Status
Check Status
Busy
Busy
© 2008 Microchip Technology Inc.
Ready
Ready
Busy
Busy
status from DO.
High-Z
High-Z
status of the
T
T
CZ
CZ