MAX8741EAI-T Maxim Integrated, MAX8741EAI-T Datasheet - Page 13
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MAX8741EAI-T
Manufacturer Part Number
MAX8741EAI-T
Description
Current & Power Monitors & Regulators
Manufacturer
Maxim Integrated
Datasheet
1.MAX8741EAI.pdf
(34 pages)
Table 2. Component Suppliers
The MAX8741/MAX8742 contain 10 major circuit blocks
(Figure 2).
The two pulse-width-modulation (PWM) controllers
each consist of a dual-mode feedback network and
multiplexer, a multi-input PWM comparator, high-side
and low-side gate drivers, and logic. The MAX8741/
MAX8742 contain fault-protection circuits that monitor
the main PWM outputs for undervoltage and overvolt-
age. A power-on sequence block controls the power-
up timing of the main PWMs and determines whether
one or both of the outputs are monitored for undervoltage
faults. The MAX8742 includes a secondary feedback net-
work and 12V linear regulator to generate a 12V output
from a coupled-inductor flyback winding. The MAX8741
has a secondary feedback input (SECFB) instead, which
allows a quasi-regulated, adjustable output, coupled-
inductor flyback winding to be attached to either the 3.3V
or the 5V main inductor. Bias generator blocks include
the 5V IC internal rail (V
reference, and automatic bootstrap switchover circuit.
The PWMs share a common 333kHz/500kHz synchroniz-
able oscillator.
These internal IC blocks are not powered directly from
the battery. Instead, the 5V V
down the battery voltage to supply both V
gate drivers. The synchronous-switch gate drivers are
directly powered from V
gate drivers are indirectly powered from V
nal diode-capacitor boost circuit. An automatic boot-
strap circuit turns off the 5V linear regulator and powers
the IC from the 5V PWM output voltage if the output is
above 4.5V.
The two PWM controllers are nearly identical. The only
differences are fixed output settings (3.3V vs. 5V), the
V
and SECFB. The heart of each current-mode PWM con-
troller is a multi-input, open-loop comparator that sums
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Dale-Vishay
Fairchild Semiconductor
International Rectifier
Sanyo
Sumida
Taiyo Yuden
/CSL5 bootstrap switch connected to the 5V PWM,
500kHz Multi-Output Power-Supply Controllers
MANUFACTURER
______________________________________________________________________________________
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) linear regulator, 2.5V precision
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, while the high-side switch
PWM Controller Block
www.vishay.com
www.fairchildsemi.com
www.irf.com
www.sanyo.com
www.sumida.com
www.t-yuden.com
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with High Impedance in Shutdown
linear regulator steps
WEBSITE
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by an exter-
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and the
three signals: the output-voltage error signal with
respect to the reference voltage, the current-sense sig-
nal, and the slope-compensation ramp (Figure 3). The
PWM controller is a direct-summing type, lacking a tra-
ditional error amplifier and the phase shift associated
with it. This direct-summing configuration approaches
ideal cycle-by-cycle control over the output voltage.
When SKIP = low, idle-mode circuitry automatically
optimizes efficiency throughout the load current range.
Idle mode dramatically improves light-load efficiency
by reducing the effective frequency, which reduces
switching losses. It keeps the peak inductor current
above 25% of the full current limit in an active cycle,
allowing subsequent cycles to be skipped. Idle mode
transitions seamlessly to fixed-frequency PWM opera-
tion as load current increases.
With SKIP = high, the controller always operates in fixed-
frequency PWM mode for lowest noise. Each pulse from
the oscillator sets the main PWM latch that turns on the
high-side switch for a period determined by the duty fac-
tor (approximately V
turns off, the synchronous-rectifier latch sets; 60ns later,
the low-side switch turns on. The low-side switch stays on
until the beginning of the next clock cycle.
In PWM mode, the controller operates as a fixed-fre-
quency current-mode controller where the duty ratio is
set by the input/output voltage ratio. The current-mode
feedback system regulates the peak inductor-current
value as a function of the output-voltage error signal. In
continuous-conduction mode, the average inductor
current is nearly the same as the peak current, so the
circuit acts as a switch-mode transconductance ampli-
fier. This pushes the second output LC filter pole, nor-
mally found in a duty-factor-controlled (voltage-mode)
PWM, to a higher frequency. To preserve inner-loop
stability and eliminate regenerative inductor current
“staircasing,” a slope-compensation ramp is summed
into the main PWM comparator to make the apparent
duty factor less than 50%.
The MAX8741/MAX8742 use a relatively low loop gain,
allowing the use of lower-cost output capacitors. The
relative gains of the voltage-sense and current-sense
inputs are weighted by the values of current sources
that bias three differential input stages in the main PWM
comparator (Figure 4). The relative gain of the voltage
comparator to the current comparator is internally fixed
at K = 2:1. The low loop gain results in the 2% typical
load-regulation error. The low value of loop gain helps
reduce output-filter-capacitor size and cost by shifting
the unity-gain crossover frequency to a lower level.
OUT
/ V
IN
). As the high-side switch
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