74HCT244PW-T NXP Semiconductors, 74HCT244PW-T Datasheet

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74HCT244PW-T

Manufacturer Part Number
74HCT244PW-T
Description
Buffers & Line Drivers OCTAL BUFFER 3-STATE
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74HCT244PW-T

Product Category
Buffers & Line Drivers
Rohs
yes
Number Of Input Lines
8
Number Of Output Lines
8
Polarity
Non-Inverting
Supply Voltage - Max
5.5 V
Supply Voltage - Min
4.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
SOT-360-20
High Level Output Current
- 6 mA
Logic Family
HCT
Logic Type
CMOS
Low Level Output Current
6 mA
Minimum Operating Temperature
- 40 C
Number Of Channels Per Chip
8
Output Type
3-State
Propagation Delay Time
22 ns at 4.5 V
Factory Pack Quantity
2500
Part # Aliases
74HCT244PW,118
1. General description
2. Features and benefits
3. Ordering information
Table 1.
Type number
74HC244N
74HCT244N
74HC244D
74HCT244D
74HC244DB
74HCT244DB
74HC244PW
74HCT244PW
74HC244BQ
74HCT244BQ
Ordering information
Package
Temperature range
40 C to +125 C
40 C to +125 C
40 C to +125 C
40 C to +125 C
40 C to +125 C
The 74HC244; 74HCT244 is an 8-bit buffer/line driver with 3-state outputs. The device
can be used as two 4-bit buffers or one 8-bit buffer. The device features two output
enables (1OE and 2OE), each controlling four of the 3-state outputs. A HIGH on nOE
causes the outputs to assume a high-impedance OFF-state. Inputs include clamp diodes
that enable the use of current limiting resistors to interface inputs to voltages in excess of
V
CC
74HC244; 74HCT244
Octal buffer/line driver; 3-state
Rev. 4 — 24 September 2012
Input levels:
Octal bus interface
Non-inverting 3-state outputs
Complies with JEDEC standard no. 7 A
ESD protection:
Multiple package options
Specified from 40 C to +85 C and 40 C to +125 C
.
For 74HC244: CMOS level
For 74HCT244: TTL level
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Name
DIP20
SO20
SSOP20
TSSOP20
DHVQFN20 plastic dual-in-line compatible thermal enhanced
Description
plastic dual in-line package; 20 leads (300 mil)
plastic small outline package; 20 leads;
body width 7.5 mm
plastic shrink small outline package; 20 leads;
body width 5.3 mm
plastic thin shrink small outline package; 20 leads;
body width 4.4 mm
very thin quad flat package; no leads; 20 terminals;
body 2.5  4.5  0.85 mm
Product data sheet
Version
SOT146-1
SOT163-1
SOT339-1
SOT360-1
SOT764-1

Related parts for 74HCT244PW-T

74HCT244PW-T Summary of contents

Page 1

... Name Description DIP20 plastic dual in-line package; 20 leads (300 mil) SO20 plastic small outline package; 20 leads; ...

Page 2

... NXP Semiconductors 4. Functional diagram Fig 1. Functional diagram 2 18 1A0 1Y0 2A0 4 16 1A1 2A1 1Y1 6 14 1A2 2A2 1Y2 8 12 1A3 1Y3 2A3 1 1OE 2OE Fig 2. Logic symbol 74HC_HCT244 Product data sheet 1A0 1Y0 2 1A1 1Y1 4 1Y2 1A2 6 1A3 1Y3 8 1OE ...

Page 3

... NXP Semiconductors 5. Pinning information 5.1 Pinning 74HC244 74HCT244 1OE 1 1A0 2 2Y0 3 4 1A1 5 2Y1 1A2 6 2Y2 7 1A3 8 9 2Y3 10 GND Fig 4. Pin configuration DIP20, SO20, (T)SSOP20 5.2 Pin description Table 2. Pin description Symbol Pin 1OE, 2OE 1, 19 1A0, 1A1, 1A2, 1A3 2Y0, 2Y1, 2Y2, 2Y3 ...

Page 4

... NXP Semiconductors 6. Functional description [1] Table 3. Function table Input nOE [ HIGH voltage level LOW voltage level don’t care high-impedance OFF-state. 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). ...

Page 5

... NXP Semiconductors Table 5. Recommended operating conditions Symbol Parameter 74HCT244 V supply voltage CC V input voltage I V output voltage O t/V input transition rise and fall rate V T ambient temperature amb 9. Static characteristics Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). ...

Page 6

... NXP Semiconductors Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions 74HCT244 V HIGH-level input voltage V LOW-level input voltage V HIGH-level output voltage = 20   LOW-level ...

Page 7

... NXP Semiconductors Table 7. Dynamic characteristics GND = 0 V; for load circuit see Figure Symbol Parameter Conditions t enable time nOE to nYn; see disable time nOE to nYn or see dis transition time see power dissipation per buffer capacitance ...

Page 8

... NXP Semiconductors 11. Waveforms Measurement points are given in V and V are typical voltage output levels that occur with the output load Fig 6. Input (nAn) to output (nYn) propagation delays and output transition times nOE input nYn output LOW-to-OFF OFF-to-LOW nYn output ...

Page 9

... NXP Semiconductors negative Test data is given in Table Definitions test circuit Termination resistance should be equal to output impedance Load capacitance including jig and probe capacitance Load resistance Test selection switch. Fig 8. Test circuit for measuring switching times Table 9. Test data ...

Page 10

... NXP Semiconductors 12. Package outline DIP20: plastic dual in-line package; 20 leads (300 mil pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions UNIT max. min. max. mm 4.2 0.51 3.2 inches 0.17 0.02 0.13 Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. ...

Page 11

... NXP Semiconductors SO20: plastic small outline package; 20 leads; body width 7 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.3 2.45 mm 2.65 0.25 0.1 2.25 0.012 0.096 inches 0.1 0.01 0.004 0.089 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...

Page 12

... NXP Semiconductors SSOP20: plastic shrink small outline package; 20 leads; body width 5 pin 1 index 1 e DIMENSIONS (mm are the original dimensions) A UNIT max. 0.21 1. 0.25 0.05 1.65 Note 1. Plastic or metal protrusions of 0.2 mm maximum per side are not included. OUTLINE VERSION IEC SOT339-1 Fig 11 ...

Page 13

... NXP Semiconductors TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...

Page 14

... NXP Semiconductors DHVQFN20: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 20 terminals; body 2.5 x 4.5 x 0.85 mm terminal 1 index area terminal 1 index area DIMENSIONS (mm are the original dimensions) (1) A UNIT max. 0.05 0. 0.2 0.00 0.18 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. ...

Page 15

... Product data sheet Data sheet status Product data sheet The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. Legal texts have been adapted to the new company name where appropriate. Product data sheet Product specification All information provided in this document is subject to legal disclaimers. Rev. 4 — ...

Page 16

... Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...

Page 17

... Product data sheet NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ ...

Page 18

... NXP Semiconductors 17. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 Functional description . . . . . . . . . . . . . . . . . . . 4 7 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 6 11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10 13 Abbreviations ...

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