74LVC1G00GW-R NXP Semiconductors, 74LVC1G00GW-R Datasheet - Page 6

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74LVC1G00GW-R

Manufacturer Part Number
74LVC1G00GW-R
Description
Logic Gates SINGLE 2-INPUT NAND GATE
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74LVC1G00GW-R

Product Category
Logic Gates
Rohs
yes
Product
NAND
Logic Family
LVC
Number Of Gates
1
Number Of Lines (input / Output)
2 / 1
High Level Output Current
- 32 mA
Low Level Output Current
32 mA
Propagation Delay Time
2.2 ns
Supply Voltage - Max
5.5 V
Supply Voltage - Min
1.65 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
SOT-353
Minimum Operating Temperature
- 40 C
Number Of Input Lines
2
Number Of Output Lines
1
Factory Pack Quantity
10000
Part # Aliases
74LVC1G00GW,165
NXP Semiconductors
Table 7.
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
[1]
11. Dynamic characteristics
Table 8.
Voltages are referenced to GND (ground = 0 V); for load circuit see
[1]
[2]
[3]
74LVC1G00
Product data sheet
Symbol Parameter
I
I
I
C
Symbol Parameter
t
C
OFF
CC
pd
I
PD
CC
All typical values are measured at V
Typical values are measured at T
t
C
P
f
f
C
V
N = number of inputs switching;
(C
pd
i
o
D
CC
PD
= input frequency in MHz;
L
= output frequency in MHz;
is the same as t
= output load capacitance in pF;
= C
L
is used to determine the dynamic power dissipation (P
= supply voltage in V;
 V
power-off
leakage
current
supply current V
additional
supply current
input
capacitance
propagation delay A, B to Y; see
power dissipation
capacitance
PD
Static characteristics
Dynamic characteristics
CC
 V
2
 f
CC
o
2
) = sum of outputs.
 f
PLH
i
 N + (C
and t
Conditions
V
V
V
V
per pin
V
CC
I
CC
CC
I
CC
PHL
= 5.5 V or GND; I
= V
Conditions
V
V
= 0 V; V
= 1.65 V to 5.5 V
= 2.3 V to 5.5 V;
= 3.3 V; V
L
I
CC
.
CC
V
V
V
V
V
= GND to V
 V
amb
CC
CC
CC
CC
CC
…continued
= 3.3 V
 0.6 V; I
CC
CC
= 1.65 V to 1.95 V
= 2.3 V to 2.7 V
= 2.7 V
= 3.0 V to 3.6 V
= 4.5 V to 5.5 V
= 25 C and V
2
= 3.3 V and T
I
 f
or V
I
o
= GND to V
All information provided in this document is subject to legal disclaimers.
) where:
O
CC
O
Figure 8
= 5.5 V
O
= 0 A;
;
= 0 A;
CC
amb
Rev. 10 — 2 July 2012
= 1.8 V, 2.5 V, 2.7 V, 3.3 V and 5.0 V respectively.
CC
= 25 C.
D
in W).
[2]
[3]
Min
-
-
-
-
Figure
Min
1.0
0.5
0.5
0.5
0.5
40 C to +85 C
-
40 C to +85 C
9.
Typ
0.1
0.1
Typ
5
5
3.3
2.2
2.6
2.2
1.8
[1]
14
[1]
Max
10
500
10
-
Max
8.0
5.5
5.8
4.7
4.0
-
Single 2-input NAND gate
40 C to +125 C
40 C to +125 C Unit
74LVC1G00
Min
Min
-
-
-
-
0.5
1.0
0.5
0.5
0.5
-
© NXP B.V. 2012. All rights reserved.
200
5000
Max
200
Max
10.5
7.0
7.5
6.0
5.5
-
-
ns
ns
ns
ns
ns
pF
Unit
A
A
A
pF
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