NCP4303AMNTWG ON Semiconductor, NCP4303AMNTWG Datasheet - Page 16

• Manufacturer Part Number: NCP4303AMNTWG
• Description: Power Switch ICs - Power Distribution SEC SIDE SYNC RECT DRV
• Manufacturer: ON Semiconductor

Specifications of NCP4303AMNTWG

• Product Category: Power Switch ICs - Power Distribution

Typical value of compensation inductance for a TO220
package is 7 nH. The parasitic inductance can differ depends
on how much are the leads shortened during the assembly
process. The compensation inductance design has to be done
with enough margin to overcome situation that the system
beneficial in applications that are using a low R
MOSFET in non−SMT package. Using the compensation
method allows for optimized efficiency with a standard
TO220 package that in turn results in reduced costs, as the
SMT MOSFETs usually require reflow soldering process
and more expensive PCB.
evident that turn−off threshold precision is quite critical. If
we consider a SR MOSFET with R
error voltage on the CS pin results in a 1 A turn−off current
threshold difference. Thus the PCB layout is very critical
when implementing the SR system. Note that the CS
turn−off comparator as well as compensation inputs are
referred to the GND pin. Any parasitic impedance (resistive
or inductive − talking about mW and nH values) can cause
a high error voltage that is then evaluated by the CS
Note that using the compensation system is only
From the above paragraphs and parameter tables it is
Figure 37. Waveforms from SR System Using MOSFET in TO220 Package with Parasitic Inductance
Compensation – SR MOSFET Channel Conduction Time Optimized
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of 1 mW, the 1 mV
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will become overcompensated due to packaging and
assembly process variations. Waveforms from the
application with compensated SR system can be seen in
Figure 37. One can see the conduction time has been
significantly increased and turn−off current reduced.
comparator. Ideally the CS turn–off comparator should
detect voltage that is caused by secondary current directly on
the SR MOSFET channel resistance. Practically this is not
possible because of the bonding wires, leads and soldering.
To assure the best efficiency results, a Kelvin connection of
the SR controller to the power circuitry should be
implemented (i.e. GND pin should be connected to the SR
MOSFET source soldering point and current sense pin
should be connected to the SR MOSFET drain soldering
point). Any impact of PCB parasitic elements on the SR
controller functionality is then avoided. Figures 38 and 39
show examples of SR system layouts using parasitic
inductance compensation (i.e. for low R
TO220 package ) and not using compensation (i.e. for higher
R
MOSFETs ).
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MOSFET in TO220 package or SMT package
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MOSFET in